arch/arm/dts/imx6qdl-wandboard.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright 2013 Freescale Semiconductor, Inc.
   4  *
   5  * Author: Fabio Estevam <fabio.estevam@freescale.com>
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9
  10 / {
  11         aliases {
  12                 mmc0 = &usdhc3;
  13         };
  14
  15         chosen {
  16                 stdout-path = &uart1;
  17         };
  18
  19         sound {
  20                 compatible = "fsl,imx6-wandboard-sgtl5000",
  21                              "fsl,imx-audio-sgtl5000";
  22                 model = "imx6-wandboard-sgtl5000";
  23                 ssi-controller = <&ssi1>;
  24                 audio-codec = <&codec>;
  25                 audio-routing =
  26                         "MIC_IN", "Mic Jack",
  27                         "Mic Jack", "Mic Bias",
  28                         "Headphone Jack", "HP_OUT";
  29                 mux-int-port = <1>;
  30                 mux-ext-port = <3>;
  31         };
  32
  33         sound-spdif {
  34                 compatible = "fsl,imx-audio-spdif";
  35                 model = "imx-spdif";
  36                 spdif-controller = <&spdif>;
  37                 spdif-out;
  38         };
  39
  40         reg_2p5v: regulator-2p5v {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "2P5V";
  43                 regulator-min-microvolt = <2500000>;
  44                 regulator-max-microvolt = <2500000>;
  45                 regulator-always-on;
  46         };
  47
  48         reg_3p3v: regulator-3p3v {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "3P3V";
  51                 regulator-min-microvolt = <3300000>;
  52                 regulator-max-microvolt = <3300000>;
  53                 regulator-always-on;
  54         };
  55
  56         reg_usb_otg_vbus: regulator-usbotgvbus {
  57                 compatible = "regulator-fixed";
  58                 regulator-name = "usb_otg_vbus";
  59                 regulator-min-microvolt = <5000000>;
  60                 regulator-max-microvolt = <5000000>;
  61                 pinctrl-names = "default";
  62                 pinctrl-0 = <&pinctrl_usbotgvbus>;
  63                 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
  64         };
  65 };
  66
  67 &audmux {
  68         pinctrl-names = "default";
  69         pinctrl-0 = <&pinctrl_audmux>;
  70         status = "okay";
  71 };
  72
  73 &hdmi {
  74         ddc-i2c-bus = <&i2c1>;
  75         status = "okay";
  76 };
  77
  78 &i2c1 {
  79         clock-frequency = <100000>;
  80         pinctrl-names = "default";
  81         pinctrl-0 = <&pinctrl_i2c1>;
  82         status = "okay";
  83 };
  84
  85 &i2c2 {
  86         clock-frequency = <100000>;
  87         pinctrl-names = "default";
  88         pinctrl-0 = <&pinctrl_i2c2>;
  89         status = "okay";
  90
  91         codec: sgtl5000@a {
  92                 pinctrl-names = "default";
  93                 pinctrl-0 = <&pinctrl_mclk>;
  94                 compatible = "fsl,sgtl5000";
  95                 reg = <0x0a>;
  96                 clocks = <&clks IMX6QDL_CLK_CKO>;
  97                 VDDA-supply = <&reg_2p5v>;
  98                 VDDIO-supply = <&reg_3p3v>;
  99                 lrclk-strength = <3>;
 100         };
 101 };
 102
 103 &iomuxc {
 104         pinctrl-names = "default";
 105
 106         imx6qdl-wandboard {
 107
 108                 pinctrl_audmux: audmuxgrp {
 109                         fsl,pins = <
 110                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
 111                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
 112                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
 113                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
 114                         >;
 115                 };
 116
 117                 pinctrl_enet: enetgrp {
 118                         fsl,pins = <
 119                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
 120                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
 121                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
 122                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
 123                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
 124                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
 125                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
 126                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
 127                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
 128                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
 129                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
 130                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
 131                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
 132                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
 133                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
 134                                 MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
 135                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
 136                         >;
 137                 };
 138
 139                 pinctrl_i2c1: i2c1grp {
 140                         fsl,pins = <
 141                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
 142                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
 143                         >;
 144                 };
 145
 146                 pinctrl_i2c2: i2c2grp {
 147                         fsl,pins = <
 148                                 MX6QDL_PAD_KEY_COL3__I2C2_SCL           0x4001b8b1
 149                                 MX6QDL_PAD_KEY_ROW3__I2C2_SDA           0x4001b8b1
 150                         >;
 151                 };
 152
 153                 pinctrl_mclk: mclkgrp {
 154                         fsl,pins = <
 155                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1            0x130b0
 156                         >;
 157                 };
 158
 159                 pinctrl_spdif: spdifgrp {
 160                         fsl,pins = <
 161                                 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT         0x1b0b0
 162                         >;
 163                 };
 164
 165                 pinctrl_uart1: uart1grp {
 166                         fsl,pins = <
 167                                 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA    0x1b0b1
 168                                 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA    0x1b0b1
 169                         >;
 170                 };
 171
 172                 pinctrl_uart3: uart3grp {
 173                         fsl,pins = <
 174                                 MX6QDL_PAD_EIM_D24__UART3_TX_DATA       0x1b0b1
 175                                 MX6QDL_PAD_EIM_D25__UART3_RX_DATA       0x1b0b1
 176                                 MX6QDL_PAD_EIM_D23__UART3_CTS_B         0x1b0b1
 177                                 MX6QDL_PAD_EIM_EB3__UART3_RTS_B         0x1b0b1
 178                         >;
 179                 };
 180
 181                 pinctrl_usbotg: usbotggrp {
 182                         fsl,pins = <
 183                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID           0x17059
 184                         >;
 185                 };
 186
 187                 pinctrl_usbotgvbus: usbotgvbusgrp {
 188                         fsl,pins = <
 189                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22          0x130b0
 190                         >;
 191                 };
 192
 193                 pinctrl_usdhc1: usdhc1grp {
 194                         fsl,pins = <
 195                                 MX6QDL_PAD_SD1_CMD__SD1_CMD             0x17059
 196                                 MX6QDL_PAD_SD1_CLK__SD1_CLK             0x10059
 197                                 MX6QDL_PAD_SD1_DAT0__SD1_DATA0          0x17059
 198                                 MX6QDL_PAD_SD1_DAT1__SD1_DATA1          0x17059
 199                                 MX6QDL_PAD_SD1_DAT2__SD1_DATA2          0x17059
 200                                 MX6QDL_PAD_SD1_DAT3__SD1_DATA3          0x17059
 201                         >;
 202                 };
 203
 204                 pinctrl_usdhc2: usdhc2grp {
 205                         fsl,pins = <
 206                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
 207                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10059
 208                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
 209                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
 210                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
 211                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
 212                         >;
 213                 };
 214
 215                 pinctrl_usdhc3: usdhc3grp {
 216                         fsl,pins = <
 217                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
 218                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
 219                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
 220                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
 221                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
 222                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
 223                         >;
 224                 };
 225         };
 226 };
 227
 228 &fec {
 229         pinctrl-names = "default";
 230         pinctrl-0 = <&pinctrl_enet>;
 231         phy-mode = "rgmii-id";
 232         phy-handle = <&ethphy>;
 233         phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
 234         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
 235                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
 236         fsl,err006687-workaround-present;
 237         status = "okay";
 238
 239         mdio {
 240                 #address-cells = <1>;
 241                 #size-cells = <0>;
 242
 243                 ethphy: ethernet-phy@1 {
 244                         reg = <1>;
 245                 };
 246         };
 247 };
 248
 249 &spdif {
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_spdif>;
 252         status = "okay";
 253 };
 254
 255 &ssi1 {
 256         status = "okay";
 257 };
 258
 259 &uart1 {
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&pinctrl_uart1>;
 262         status = "okay";
 263 };
 264
 265 &uart3 {
 266         pinctrl-names = "default";
 267         pinctrl-0 = <&pinctrl_uart3>;
 268         uart-has-rtscts;
 269         status = "okay";
 270 };
 271
 272 &usbh1 {
 273         status = "okay";
 274 };
 275
 276 &usbotg {
 277         vbus-supply = <&reg_usb_otg_vbus>;
 278         pinctrl-names = "default";
 279         pinctrl-0 = <&pinctrl_usbotg>;
 280         disable-over-current;
 281         dr_mode = "otg";
 282         status = "okay";
 283 };
 284
 285 &usdhc1 {
 286         pinctrl-names = "default";
 287         pinctrl-0 = <&pinctrl_usdhc1>;
 288         cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
 289         status = "okay";
 290 };
 291
 292 &usdhc3 {
 293         pinctrl-names = "default";
 294         pinctrl-0 = <&pinctrl_usdhc3>;
 295         cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
 296         status = "okay";
 297 };