arch/arm/dts/imx6q-bx50v3.dts

   1 /* SPDX-License-Identifier: GPL-2.0+ OR X11 */
   2 /*
   3  * Copyright 2015 Timesys Corporation.
   4  * Copyright 2018 General Electric Company
   5  * Based on imx6q-ba16.dtsi and imx6q-bx50v3.dtsi from kernel 4.20.5.
   6  */
   7
   8 /dts-v1/;
   9
  10 #include "imx6q.dtsi"
  11 #include <dt-bindings/gpio/gpio.h>
  12
  13 / {
  14         model = "General Electric Bx50v3";
  15         compatible = "ge,imx6q-bx50v3", "advantech,imx6q-ba16", "fsl,imx6q";
  16 };
  17
  18 &iomuxc {
  19         pinctrl-names = "default";
  20
  21         pinctrl_ecspi1: ecspi1grp {
  22                 fsl,pins = <
  23                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  24                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  25                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  26                         /* SPI1 CS */
  27                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30  0x1b0b0
  28                 >;
  29         };
  30
  31         pinctrl_usdhc3: usdhc3grp {
  32                 fsl,pins = <
  33                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
  34                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
  35                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
  36                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
  37                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
  38                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
  39                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
  40                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
  41                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
  42                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
  43                 >;
  44         };
  45
  46         pinctrl_usdhc3_reset: usdhc3grp-reset {
  47                 fsl,pins = <
  48                         MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
  49                 >;
  50         };
  51 };
  52
  53 &usdhc1 {
  54         status = "disabled";
  55 };
  56
  57 &usdhc2 {
  58         status = "disabled";
  59 };
  60
  61 /* eMMC */
  62 &usdhc3 {
  63         pinctrl-names = "default";
  64         pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
  65         bus-width = <8>;
  66         non-removable;
  67         keep-power-in-suspend;
  68         status = "okay";
  69 };
  70
  71 &usdhc4 {
  72         status = "disabled";
  73 };
  74
  75 /* SPI NOR */
  76 &ecspi1 {
  77         cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
  78         pinctrl-names = "default";
  79         pinctrl-0 = <&pinctrl_ecspi1>;
  80         status = "okay";
  81
  82         flash: n25q032@0 {
  83                 compatible = "jedec,spi-nor";
  84                 #address-cells = <1>;
  85                 #size-cells = <1>;
  86                 spi-max-frequency = <20000000>;
  87                 reg = <0>;
  88         };
  89 };