arch/arm/dts/imx6q-ba16.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * Support for imx6 based Advantech DMS-BA16 Qseven module
   4  *
   5  * Copyright 2015 Timesys Corporation.
   6  * Copyright 2015 General Electric Company
   7  *
   8  * This file is dual-licensed: you can use it either under the terms
   9  * of the GPL or the X11 license, at your option. Note that this dual
  10  * licensing only applies to this file, and not this project as a
  11  * whole.
  12  *
  13  *  a) This file is free software; you can redistribute it and/or
  14  *     modify it under the terms of the GNU General Public License
  15  *     version 2 as published by the Free Software Foundation.
  16  *
  17  *     This file is distributed in the hope that it will be useful,
  18  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *     GNU General Public License for more details.
  21  *
  22  * Or, alternatively,
  23  *
  24  *  b) Permission is hereby granted, free of charge, to any person
  25  *     obtaining a copy of this software and associated documentation
  26  *     files (the "Software"), to deal in the Software without
  27  *     restriction, including without limitation the rights to use,
  28  *     copy, modify, merge, publish, distribute, sublicense, and/or
  29  *     sell copies of the Software, and to permit persons to whom the
  30  *     Software is furnished to do so, subject to the following
  31  *     conditions:
  32  *
  33  *     The above copyright notice and this permission notice shall be
  34  *     included in all copies or substantial portions of the Software.
  35  *
  36  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  37  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  38  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  39  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  40  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  41  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  42  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  43  *     OTHER DEALINGS IN THE SOFTWARE.
  44  */
  45
  46 #include "imx6q.dtsi"
  47 #include <dt-bindings/gpio/gpio.h>
  48
  49 / {
  50         memory@10000000 {
  51                 device_type = "memory";
  52                 reg = <0x10000000 0x40000000>;
  53         };
  54
  55         backlight_lvds: backlight {
  56                 compatible = "pwm-backlight";
  57                 pinctrl-names = "default";
  58                 pinctrl-0 = <&pinctrl_display>;
  59                 pwms = <&pwm1 0 5000000>;
  60                 brightness-levels = <  0   1   2   3   4   5   6   7   8   9
  61                                       10  11  12  13  14  15  16  17  18  19
  62                                       20  21  22  23  24  25  26  27  28  29
  63                                       30  31  32  33  34  35  36  37  38  39
  64                                       40  41  42  43  44  45  46  47  48  49
  65                                       50  51  52  53  54  55  56  57  58  59
  66                                       60  61  62  63  64  65  66  67  68  69
  67                                       70  71  72  73  74  75  76  77  78  79
  68                                       80  81  82  83  84  85  86  87  88  89
  69                                       90  91  92  93  94  95  96  97  98  99
  70                                      100 101 102 103 104 105 106 107 108 109
  71                                      110 111 112 113 114 115 116 117 118 119
  72                                      120 121 122 123 124 125 126 127 128 129
  73                                      130 131 132 133 134 135 136 137 138 139
  74                                      140 141 142 143 144 145 146 147 148 149
  75                                      150 151 152 153 154 155 156 157 158 159
  76                                      160 161 162 163 164 165 166 167 168 169
  77                                      170 171 172 173 174 175 176 177 178 179
  78                                      180 181 182 183 184 185 186 187 188 189
  79                                      190 191 192 193 194 195 196 197 198 199
  80                                      200 201 202 203 204 205 206 207 208 209
  81                                      210 211 212 213 214 215 216 217 218 219
  82                                      220 221 222 223 224 225 226 227 228 229
  83                                      230 231 232 233 234 235 236 237 238 239
  84                                      240 241 242 243 244 245 246 247 248 249
  85                                      250 251 252 253 254 255>;
  86                 default-brightness-level = <255>;
  87                 enable-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
  88         };
  89
  90         reg_1p8v: regulator-1p8v {
  91                 compatible = "regulator-fixed";
  92                 regulator-name = "1P8V";
  93                 regulator-min-microvolt = <1800000>;
  94                 regulator-max-microvolt = <1800000>;
  95                 regulator-always-on;
  96         };
  97
  98         reg_3p3v: regulator-3p3v {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "3P3V";
 101                 regulator-min-microvolt = <3300000>;
 102                 regulator-max-microvolt = <3300000>;
 103                 regulator-always-on;
 104         };
 105
 106         reg_lvds: regulator-lvds {
 107                 compatible = "regulator-fixed";
 108                 regulator-name = "lvds_ppen";
 109                 regulator-min-microvolt = <3300000>;
 110                 regulator-max-microvolt = <3300000>;
 111                 regulator-boot-on;
 112                 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
 113                 enable-active-high;
 114         };
 115
 116         reg_usb_h1_vbus: regulator-usbh1vbus {
 117                 compatible = "regulator-fixed";
 118                 regulator-name = "usb_h1_vbus";
 119                 regulator-min-microvolt = <5000000>;
 120                 regulator-max-microvolt = <5000000>;
 121         };
 122
 123         reg_usb_otg_vbus: regulator-usbotgvbus {
 124                 compatible = "regulator-fixed";
 125                 regulator-name = "usb_otg_vbus";
 126                 regulator-min-microvolt = <5000000>;
 127                 regulator-max-microvolt = <5000000>;
 128         };
 129 };
 130
 131 &audmux {
 132         pinctrl-names = "default";
 133         pinctrl-0 = <&pinctrl_audmux>;
 134         status = "okay";
 135 };
 136
 137 &ecspi1 {
 138         cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
 139         pinctrl-names = "default";
 140         pinctrl-0 = <&pinctrl_ecspi1>;
 141         status = "okay";
 142
 143         flash: n25q032@0 {
 144                 compatible = "jedec,spi-nor";
 145                 #address-cells = <1>;
 146                 #size-cells = <1>;
 147                 spi-max-frequency = <20000000>;
 148                 reg = <0>;
 149
 150                 partition@0 {
 151                         label = "U-Boot";
 152                         reg = <0x0 0xc0000>;
 153                 };
 154
 155                 partition@c0000 {
 156                         label = "env";
 157                         reg = <0xc0000 0x10000>;
 158                 };
 159
 160                 partition@d0000 {
 161                         label = "spare";
 162                         reg = <0xd0000 0x320000>;
 163                 };
 164
 165                 partition@3f0000 {
 166                         label = "mfg";
 167                         reg = <0x3f0000 0x10000>;
 168                 };
 169         };
 170 };
 171
 172 &fec {
 173         pinctrl-names = "default";
 174         pinctrl-0 = <&pinctrl_enet>;
 175         phy-mode = "rgmii-id";
 176         status = "okay";
 177 };
 178
 179 &hdmi {
 180         ddc-i2c-bus = <&i2c2>;
 181         status = "okay";
 182 };
 183
 184 &i2c1 {
 185         clock-frequency = <100000>;
 186         pinctrl-names = "default";
 187         pinctrl-0 = <&pinctrl_i2c1>;
 188         status = "okay";
 189 };
 190
 191 &i2c2 {
 192         clock-frequency = <100000>;
 193         pinctrl-names = "default";
 194         pinctrl-0 = <&pinctrl_i2c2>;
 195         status = "okay";
 196 };
 197
 198 &i2c3 {
 199         clock-frequency = <100000>;
 200         pinctrl-names = "default";
 201         pinctrl-0 = <&pinctrl_i2c3>;
 202         status = "okay";
 203
 204         pmic@58 {
 205                 compatible = "dlg,da9063";
 206                 reg = <0x58>;
 207                 pinctrl-names = "default";
 208                 pinctrl-0 = <&pinctrl_pmic>;
 209                 interrupt-parent = <&gpio7>;
 210                 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
 211
 212                 onkey {
 213                         compatible = "dlg,da9063-onkey";
 214                 };
 215
 216                 regulators {
 217                         vdd_bcore1: bcore1 {
 218                                 regulator-min-microvolt = <1420000>;
 219                                 regulator-max-microvolt = <1420000>;
 220                                 regulator-always-on;
 221                                 regulator-boot-on;
 222                         };
 223
 224                         vdd_bcore2: bcore2 {
 225                                 regulator-min-microvolt = <1420000>;
 226                                 regulator-max-microvolt = <1420000>;
 227                                 regulator-always-on;
 228                                 regulator-boot-on;
 229                         };
 230
 231                         vdd_bpro: bpro {
 232                                 regulator-min-microvolt = <1500000>;
 233                                 regulator-max-microvolt = <1500000>;
 234                                 regulator-always-on;
 235                                 regulator-boot-on;
 236                         };
 237
 238                         vdd_bmem: bmem {
 239                                 regulator-min-microvolt = <1800000>;
 240                                 regulator-max-microvolt = <1800000>;
 241                                 regulator-always-on;
 242                                 regulator-boot-on;
 243                         };
 244
 245                         vdd_bio: bio {
 246                                 regulator-min-microvolt = <1800000>;
 247                                 regulator-max-microvolt = <1800000>;
 248                                 regulator-always-on;
 249                                 regulator-boot-on;
 250                         };
 251
 252                         vdd_bperi: bperi {
 253                                 regulator-min-microvolt = <3300000>;
 254                                 regulator-max-microvolt = <3300000>;
 255                                 regulator-always-on;
 256                                 regulator-boot-on;
 257                         };
 258
 259                         vdd_ldo1: ldo1 {
 260                                 regulator-min-microvolt = <600000>;
 261                                 regulator-max-microvolt = <1860000>;
 262                         };
 263
 264                         vdd_ldo2: ldo2 {
 265                                 regulator-min-microvolt = <600000>;
 266                                 regulator-max-microvolt = <1860000>;
 267                         };
 268
 269                         vdd_ldo3: ldo3 {
 270                                 regulator-min-microvolt = <900000>;
 271                                 regulator-max-microvolt = <3440000>;
 272                         };
 273
 274                         vdd_ldo4: ldo4 {
 275                                 regulator-min-microvolt = <900000>;
 276                                 regulator-max-microvolt = <3440000>;
 277                         };
 278
 279                         vdd_ldo5: ldo5 {
 280                                 regulator-min-microvolt = <900000>;
 281                                 regulator-max-microvolt = <3600000>;
 282                         };
 283
 284                         vdd_ldo6: ldo6 {
 285                                 regulator-min-microvolt = <900000>;
 286                                 regulator-max-microvolt = <3600000>;
 287                         };
 288
 289                         vdd_ldo7: ldo7 {
 290                                 regulator-min-microvolt = <900000>;
 291                                 regulator-max-microvolt = <3600000>;
 292                         };
 293
 294                         vdd_ldo8: ldo8 {
 295                                 regulator-min-microvolt = <900000>;
 296                                 regulator-max-microvolt = <3600000>;
 297                         };
 298
 299                         vdd_ldo9: ldo9 {
 300                                 regulator-min-microvolt = <950000>;
 301                                 regulator-max-microvolt = <3600000>;
 302                         };
 303
 304                         vdd_ldo10: ldo10 {
 305                                 regulator-min-microvolt = <900000>;
 306                                 regulator-max-microvolt = <3600000>;
 307                         };
 308
 309                         vdd_ldo11: ldo11 {
 310                                 regulator-min-microvolt = <900000>;
 311                                 regulator-max-microvolt = <3600000>;
 312                                 regulator-always-on;
 313                                 regulator-boot-on;
 314                         };
 315                 };
 316         };
 317
 318         rtc@32 {
 319                 compatible = "epson,rx8010";
 320                 pinctrl-names = "default";
 321                 pinctrl-0 = <&pinctrl_rtc>;
 322                 reg = <0x32>;
 323                 interrupt-parent = <&gpio4>;
 324                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 325         };
 326 };
 327
 328 &pcie {
 329         pinctrl-names = "default";
 330         pinctrl-0 = <&pinctrl_pcie>;
 331         reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
 332         fsl,tx-swing-full = <103>;
 333         fsl,tx-swing-low = <103>;
 334         status = "okay";
 335 };
 336
 337 &pwm1 {
 338         pinctrl-names = "default";
 339         pinctrl-0 = <&pinctrl_pwm1>;
 340         status = "okay";
 341 };
 342
 343 &pwm2 {
 344         pinctrl-names = "default";
 345         pinctrl-0 = <&pinctrl_pwm2>;
 346         status = "disabled";
 347 };
 348
 349 &sata {
 350         status = "okay";
 351 };
 352
 353 &ssi1 {
 354         status = "okay";
 355 };
 356
 357 &uart3 {
 358         pinctrl-names = "default";
 359         pinctrl-0 = <&pinctrl_uart3>;
 360         uart-has-rtscts;
 361         status = "okay";
 362 };
 363
 364 &uart4 {
 365         pinctrl-names = "default";
 366         pinctrl-0 = <&pinctrl_uart4>;
 367         status = "okay";
 368 };
 369
 370 &usbh1 {
 371         pinctrl-names = "default";
 372         pinctrl-0 = <&pinctrl_usbhub>;
 373         vbus-supply = <&reg_usb_h1_vbus>;
 374         reset-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
 375         status = "okay";
 376 };
 377
 378 &usbotg {
 379         vbus-supply = <&reg_usb_otg_vbus>;
 380         pinctrl-names = "default";
 381         pinctrl-0 = <&pinctrl_usbotg>;
 382         disable-over-current;
 383         status = "okay";
 384 };
 385
 386 &usdhc2 {
 387         pinctrl-names = "default";
 388         pinctrl-0 = <&pinctrl_usdhc2>;
 389         cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
 390         no-1-8-v;
 391         keep-power-in-suspend;
 392         wakeup-source;
 393         status = "okay";
 394 };
 395
 396 &usdhc3 {
 397         pinctrl-names = "default";
 398         pinctrl-0 = <&pinctrl_usdhc3 &pinctrl_usdhc3_reset>;
 399         bus-width = <8>;
 400         vmmc-supply = <&vdd_bperi>;
 401         non-removable;
 402         keep-power-in-suspend;
 403         status = "okay";
 404 };
 405
 406 &wdog1 {
 407         pinctrl-names = "default";
 408         pinctrl-0 = <&pinctrl_wdog>;
 409         fsl,ext-reset-output;
 410 };
 411
 412 &iomuxc {
 413         pinctrl-names = "default";
 414         pinctrl-0 = <&pinctrl_hog>;
 415
 416         pinctrl_audmux: audmuxgrp {
 417                 fsl,pins = <
 418                         MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
 419                         MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x130b0
 420                         MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
 421                         MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
 422                 >;
 423         };
 424
 425         pinctrl_display: dispgrp {
 426                 fsl,pins = <
 427                         /* BLEN_OUT */
 428                         MX6QDL_PAD_GPIO_0__GPIO1_IO00    0x1b0b0
 429                         /* LVDS_PPEN_OUT */
 430                         MX6QDL_PAD_EIM_D22__GPIO3_IO22   0x1b0b0
 431                 >;
 432         };
 433
 434         pinctrl_ecspi1: ecspi1grp {
 435                 fsl,pins = <
 436                         MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
 437                         MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
 438                         MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
 439                         /* SPI1 CS */
 440                         MX6QDL_PAD_EIM_EB2__GPIO2_IO30  0x1b0b0
 441                 >;
 442         };
 443
 444         pinctrl_ecspi5: ecspi5grp {
 445                 fsl,pins = <
 446                         MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO        0x1b0b0
 447                         MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI         0x1b0b0
 448                         MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK         0x1b0b0
 449                         MX6QDL_PAD_SD1_DAT1__GPIO1_IO17         0x1b0b0
 450                 >;
 451         };
 452
 453         pinctrl_enet: enetgrp {
 454                 fsl,pins = <
 455                         MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x100b0
 456                         MX6QDL_PAD_ENET_MDC__ENET_MDC         0x100b0
 457                         MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x10030
 458                         MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x10030
 459                         MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x10030
 460                         MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x10030
 461                         MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x10030
 462                         MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
 463                         MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
 464                         MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
 465                         MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
 466                         MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
 467                         MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
 468                         MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
 469                         MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
 470                         /* FEC Reset */
 471                         MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x1b0b0
 472                         /* AR8033 Interrupt */
 473                         MX6QDL_PAD_GPIO_19__GPIO4_IO05        0x1b0b0
 474                 >;
 475         };
 476
 477         pinctrl_hog: hoggrp {
 478                 fsl,pins = <
 479                         /* GPIO 0-7 */
 480                         MX6QDL_PAD_NANDF_D0__GPIO2_IO00  0x1b0b0
 481                         MX6QDL_PAD_NANDF_D1__GPIO2_IO01  0x1b0b0
 482                         MX6QDL_PAD_NANDF_D2__GPIO2_IO02  0x1b0b0
 483                         MX6QDL_PAD_NANDF_D3__GPIO2_IO03  0x1b0b0
 484                         MX6QDL_PAD_NANDF_D4__GPIO2_IO04  0x1b0b0
 485                         MX6QDL_PAD_NANDF_D5__GPIO2_IO05  0x1b0b0
 486                         MX6QDL_PAD_NANDF_D6__GPIO2_IO06  0x1b0b0
 487                         MX6QDL_PAD_NANDF_D7__GPIO2_IO07  0x1b0b0
 488                         /* SUS_S3_OUT to CPLD */
 489                         MX6QDL_PAD_KEY_ROW2__GPIO4_IO11  0x1b0b0
 490                 >;
 491         };
 492
 493         pinctrl_i2c1: i2c1grp {
 494                 fsl,pins = <
 495                         MX6QDL_PAD_CSI0_DAT8__I2C1_SDA  0x4001b8b1
 496                         MX6QDL_PAD_CSI0_DAT9__I2C1_SCL  0x4001b8b1
 497                 >;
 498         };
 499
 500         pinctrl_i2c2: i2c2grp {
 501                 fsl,pins = <
 502                         MX6QDL_PAD_KEY_COL3__I2C2_SCL   0x4001b8b1
 503                         MX6QDL_PAD_KEY_ROW3__I2C2_SDA   0x4001b8b1
 504                 >;
 505         };
 506
 507         pinctrl_i2c3: i2c3grp {
 508                 fsl,pins = <
 509                         MX6QDL_PAD_GPIO_3__I2C3_SCL     0x4001b8b1
 510                         MX6QDL_PAD_GPIO_6__I2C3_SDA     0x4001b8b1
 511                 >;
 512         };
 513
 514         pinctrl_pcie: pciegrp {
 515                 fsl,pins = <
 516                         /* PCIe Reset */
 517                         MX6QDL_PAD_GPIO_17__GPIO7_IO12  0x1b0b0
 518                         /* PCIe Wake */
 519                         MX6QDL_PAD_GPIO_5__GPIO1_IO05   0x1b0b0
 520                 >;
 521         };
 522
 523         pinctrl_pmic: pmicgrp {
 524                 fsl,pins = <
 525                         /* PMIC Interrupt */
 526                         MX6QDL_PAD_GPIO_18__GPIO7_IO13  0x1b0b0
 527                 >;
 528         };
 529
 530         pinctrl_pwm1: pwm1grp {
 531                 fsl,pins = <
 532                         MX6QDL_PAD_SD1_DAT3__PWM1_OUT   0x1b0b1
 533                 >;
 534         };
 535
 536         pinctrl_pwm2: pwm2grp {
 537                 fsl,pins = <
 538                         MX6QDL_PAD_GPIO_1__PWM2_OUT     0x1b0b1
 539                 >;
 540         };
 541
 542         pinctrl_rtc: rtcgrp {
 543                 fsl,pins = <
 544                         /* RTC_INT */
 545                         MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
 546                 >;
 547         };
 548
 549         pinctrl_uart3: uart3grp {
 550                 fsl,pins = <
 551                         MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
 552                         MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
 553                         MX6QDL_PAD_EIM_D23__UART3_CTS_B   0x1b0b1
 554                         MX6QDL_PAD_EIM_D31__UART3_RTS_B   0x1b0b1
 555                 >;
 556         };
 557
 558         pinctrl_uart4: uart4grp {
 559                 fsl,pins = <
 560                         MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
 561                         MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
 562                 >;
 563         };
 564
 565         pinctrl_usbhub: usbhubgrp {
 566                 fsl,pins = <
 567                         /* HUB_RESET */
 568                         MX6QDL_PAD_GPIO_16__GPIO7_IO11  0x1b0b0
 569                 >;
 570         };
 571
 572         pinctrl_usbotg: usbotggrp {
 573                 fsl,pins = <
 574                         MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
 575                 >;
 576         };
 577
 578         pinctrl_usdhc2: usdhc2grp {
 579                 fsl,pins = <
 580                         MX6QDL_PAD_SD2_CMD__SD2_CMD     0x17059
 581                         MX6QDL_PAD_SD2_CLK__SD2_CLK     0x10059
 582                         MX6QDL_PAD_SD2_DAT0__SD2_DATA0  0x17059
 583                         MX6QDL_PAD_SD2_DAT1__SD2_DATA1  0x17059
 584                         MX6QDL_PAD_SD2_DAT2__SD2_DATA2  0x17059
 585                         MX6QDL_PAD_SD2_DAT3__SD2_DATA3  0x17059
 586                         /* uSDHC2 CD */
 587                         MX6QDL_PAD_GPIO_4__GPIO1_IO04   0x1b0b0
 588                 >;
 589         };
 590
 591         pinctrl_usdhc3: usdhc3grp {
 592                 fsl,pins = <
 593                         MX6QDL_PAD_SD3_CMD__SD3_CMD     0x17059
 594                         MX6QDL_PAD_SD3_CLK__SD3_CLK     0x10059
 595                         MX6QDL_PAD_SD3_DAT0__SD3_DATA0  0x17059
 596                         MX6QDL_PAD_SD3_DAT1__SD3_DATA1  0x17059
 597                         MX6QDL_PAD_SD3_DAT2__SD3_DATA2  0x17059
 598                         MX6QDL_PAD_SD3_DAT3__SD3_DATA3  0x17059
 599                         MX6QDL_PAD_SD3_DAT4__SD3_DATA4  0x17059
 600                         MX6QDL_PAD_SD3_DAT5__SD3_DATA5  0x17059
 601                         MX6QDL_PAD_SD3_DAT6__SD3_DATA6  0x17059
 602                         MX6QDL_PAD_SD3_DAT7__SD3_DATA7  0x17059
 603                 >;
 604         };
 605
 606         pinctrl_usdhc3_reset: usdhc3grp-reset {
 607                 fsl,pins = <
 608                         MX6QDL_PAD_SD3_RST__SD3_RESET   0x170F9
 609                 >;
 610         };
 611
 612         pinctrl_usdhc4: usdhc4grp {
 613                 fsl,pins = <
 614                         MX6QDL_PAD_SD4_CMD__SD4_CMD     0x17059
 615                         MX6QDL_PAD_SD4_CLK__SD4_CLK     0x17059
 616                         MX6QDL_PAD_SD4_DAT0__SD4_DATA0  0x17059
 617                         MX6QDL_PAD_SD4_DAT1__SD4_DATA1  0x17059
 618                         MX6QDL_PAD_SD4_DAT2__SD4_DATA2  0x17059
 619                         MX6QDL_PAD_SD4_DAT3__SD4_DATA3  0x17059
 620                         MX6QDL_PAD_SD4_DAT4__SD4_DATA4  0x17059
 621                         MX6QDL_PAD_SD4_DAT5__SD4_DATA5  0x17059
 622                         MX6QDL_PAD_SD4_DAT6__SD4_DATA6  0x17059
 623                         MX6QDL_PAD_SD4_DAT7__SD4_DATA7  0x17059
 624                         /* uSDHC4 CD */
 625                         MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0
 626                         /* uSDHC4 SDIO PWR */
 627                         MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
 628                         /* uSDHC4 SDIO WP */
 629                         MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0
 630                         /* uSDHC4 SDIO LED */
 631                         MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0
 632                 >;
 633         };
 634
 635         pinctrl_wdog: wdoggrp {
 636                 fsl,pins = <
 637                         MX6QDL_PAD_GPIO_9__WDOG1_B      0x1b0b0
 638                 >;
 639         };
 640 };