ARM: dts: sama5d2: Add uart4 definition
[oweals/u-boot.git] / arch / arm / dts / fsl-lx2160a-rdb.dts
1 // SPDX-License-Identifier: GPL-2.0+ OR X11
2 /*
3  * NXP LX2160ARDB device tree source
4  *
5  * Author:      Priyanka Jain <priyanka.jain@nxp.com>
6  *              Sriram Dash <sriram.dash@nxp.com>
7  *
8  * Copyright 2018 NXP
9  *
10  */
11
12 /dts-v1/;
13
14 #include "fsl-lx2160a.dtsi"
15
16 / {
17         model = "NXP Layerscape LX2160ARDB Board";
18         compatible = "fsl,lx2160ardb", "fsl,lx2160a";
19         aliases {
20                 spi0 = &fspi;
21         };
22 };
23
24 &esdhc0 {
25         status = "okay";
26 };
27
28 &esdhc1 {
29         status = "okay";
30         mmc-hs200-1_8v;
31 };
32
33 &fspi {
34         status = "okay";
35
36         mt35xu512aba0: flash@0 {
37                 #address-cells = <1>;
38                 #size-cells = <1>;
39                 compatible = "jedec,spi-nor";
40                 spi-max-frequency = <50000000>;
41                 reg = <0>;
42                 spi-rx-bus-width = <8>;
43                 spi-tx-bus-width = <1>;
44         };
45
46         mt35xu512aba1: flash@1 {
47                 #address-cells = <1>;
48                 #size-cells = <1>;
49                 compatible = "jedec,spi-nor";
50                 spi-max-frequency = <50000000>;
51                 reg = <1>;
52                 spi-rx-bus-width = <8>;
53                 spi-tx-bus-width = <1>;
54         };
55 };
56
57 &i2c0 {
58         status = "okay";
59         u-boot,dm-pre-reloc;
60 };
61
62 &i2c4 {
63         status = "okay";
64
65         rtc@51 {
66                 compatible = "pcf2127-rtc";
67                 reg = <0x51>;
68         };
69 };
70
71 &sata0 {
72         status = "okay";
73 };
74
75 &sata1 {
76         status = "okay";
77 };
78
79 &sata2 {
80         status = "okay";
81 };
82
83 &sata3 {
84         status = "okay";
85 };