arch/arm/dts/fsl-lx2160a-qds.dts

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * NXP LX2160AQDS device tree source
   4  *
   5  * Copyright 2018-2019 NXP
   6  *
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "fsl-lx2160a.dtsi"
  12
  13 / {
  14         model = "NXP Layerscape LX2160AQDS Board";
  15         compatible = "fsl,lx2160aqds", "fsl,lx2160a";
  16         aliases {
  17                 spi0 = &fspi;
  18         };
  19 };
  20
  21 &esdhc0 {
  22         status = "okay";
  23 };
  24
  25 &esdhc1 {
  26         status = "okay";
  27 };
  28
  29 &i2c0 {
  30         status = "okay";
  31         u-boot,dm-pre-reloc;
  32
  33         i2c-mux@77 {
  34                 compatible = "nxp,pca9547";
  35                 reg = <0x77>;
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 i2c@3 {
  40                         #address-cells = <1>;
  41                         #size-cells = <0>;
  42                         reg = <0x3>;
  43
  44                         rtc@51 {
  45                                 compatible = "pcf2127-rtc";
  46                                 reg = <0x51>;
  47                         };
  48                 };
  49         };
  50 };
  51
  52 &fspi {
  53         status = "okay";
  54
  55         mt35xu512aba0: flash@0 {
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58                 compatible = "jedec,spi-nor";
  59                 spi-max-frequency = <50000000>;
  60                 reg = <0>;
  61                 spi-rx-bus-width = <8>;
  62                 spi-tx-bus-width = <1>;
  63         };
  64 };
  65
  66 &sata0 {
  67         status = "okay";
  68 };
  69
  70 &sata1 {
  71         status = "okay";
  72 };
  73
  74 &sata2 {
  75         status = "okay";
  76 };
  77
  78 &sata3 {
  79         status = "okay";
  80 };