1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 3
5 * Some assumptions are made:
6 * * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4,5,6)
12 #include "fsl-lx2160a-qds.dtsi"
16 phy-handle = <&aquantia_phy1>;
17 phy-connection-type = "usxgmii";
22 phy-handle = <&aquantia_phy2>;
23 phy-connection-type = "usxgmii";
28 phy-handle = <&aquantia_phy3>;
29 phy-connection-type = "usxgmii";
34 phy-handle = <&aquantia_phy4>;
35 phy-connection-type = "usxgmii";
39 aquantia_phy1: ethernet-phy@4 {
40 compatible = "ethernet-phy-ieee802.3-c45";
43 aquantia_phy2: ethernet-phy@5 {
44 compatible = "ethernet-phy-ieee802.3-c45";
47 aquantia_phy3: ethernet-phy@6 {
48 compatible = "ethernet-phy-ieee802.3-c45";
51 aquantia_phy4: ethernet-phy@7 {
52 compatible = "ethernet-phy-ieee802.3-c45";