1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * NXP LX2160AQDS device tree source for the SERDES block #1 - protocol 19
5 * Some assumptions are made:
6 * * mezzanine card M11 is connected to IO SLOT1 (usxgmii for DPMAC 3,4)
7 * * mezzanine card M13 is connected to IO SLOT6 (25g-aui for DPMAC 5,6)
8 * * mezzanine card M7 is connected to IO SLOT2 (xlaui4 for DPMAC 2)
14 #include "fsl-lx2160a-qds.dtsi"
18 phy-handle = <&cortina_phy0>;
19 phy-connection-type = "xlaui4";
24 phy-handle = <&aquantia_phy1>;
25 phy-connection-type = "usxgmii";
30 phy-handle = <&aquantia_phy2>;
31 phy-connection-type = "usxgmii";
36 phy-handle = <&inphi_phy0>;
37 phy-connection-type = "25g-aui";
42 phy-handle = <&inphi_phy1>;
43 phy-connection-type = "25g-aui";
47 aquantia_phy1: ethernet-phy@4 {
48 compatible = "ethernet-phy-ieee802.3-c45";
52 aquantia_phy2: ethernet-phy@5 {
53 compatible = "ethernet-phy-ieee802.3-c45";
59 cortina_phy0: ethernet-phy@0 {
60 compatible = "ethernet-phy-ieee802.3-c45";
66 inphi_phy0: ethernet-phy@0 {
67 compatible = "ethernet-phy-id0210.7440";
71 inphi_phy1: ethernet-phy@1 {
72 compatible = "ethernet-phy-id0210.7440";