1 // SPDX-License-Identifier: GPL-2.0+ OR X11
3 * NXP ls1088a QDS board device tree source
10 #include "fsl-ls1088a.dtsi"
13 model = "NXP Layerscape 1088a QDS Board";
14 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
26 compatible = "nxp,pca9547";
37 compatible = "pcf2127-rtc";
47 /* NOR, NAND Flashes and FPGA on board */
48 ranges = <0 0 0x5 0x80000000 0x08000000
49 2 0 0x5 0x30000000 0x00010000
50 3 0 0x5 0x20000000 0x00010000>;
56 compatible = "cfi-flash";
57 reg = <0x0 0x0 0x8000000>;
63 compatible = "fsl,ifc-nand";
66 reg = <0x1 0x0 0x10000>;
69 fpga: board-control@3,0 {
72 compatible = "simple-bus", "fsl,ls1088aqds-fpga",
74 reg = <0x2 0x0 0x0000100>;
77 ranges = <0 2 0 0x100>;
88 compatible = "jedec,spi-nor";
90 spi-max-frequency = <1000000>; /* input clock */
93 dflash1: sst25wf040b {
96 compatible = "jedec,spi-nor";
97 spi-max-frequency = <3500000>;
102 #address-cells = <1>;
104 compatible = "jedec,spi-nor";
105 spi-max-frequency = <3500000>;
114 qflash0: s25fs512s@0 {
115 #address-cells = <1>;
117 compatible = "jedec,spi-nor";
118 spi-max-frequency = <50000000>;
122 qflash1: s25fs512s@1 {
123 #address-cells = <1>;
125 compatible = "jedec,spi-nor";
126 spi-max-frequency = <50000000>;