arch/arm/dts/exynos4x12.dtsi

   1 /*
   2  * Samsung's Exynos4x12 SoCs device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
   8  * based board files can include this file and provide values for board specfic
   9  * bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
  13  * nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17 ` * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos4.dtsi"
  21 #include "exynos4x12-pinctrl.dtsi"
  22 #include "exynos4x12-pinctrl-uboot.dtsi"
  23
  24 / {
  25         aliases {
  26                 pinctrl0 = &pinctrl_0;
  27                 pinctrl1 = &pinctrl_1;
  28                 pinctrl2 = &pinctrl_2;
  29                 pinctrl3 = &pinctrl_3;
  30         };
  31
  32         pd_isp: isp-power-domain@10023CA0 {
  33                 compatible = "samsung,exynos4210-pd";
  34                 reg = <0x10023CA0 0x20>;
  35         };
  36
  37         clock: clock-controller@10030000 {
  38                 compatible = "samsung,exynos4412-clock";
  39                 reg = <0x10030000 0x20000>;
  40                 #clock-cells = <1>;
  41         };
  42
  43         mct@10050000 {
  44                 compatible = "samsung,exynos4412-mct";
  45                 reg = <0x10050000 0x800>;
  46                 interrupt-parent = <&mct_map>;
  47                 interrupts = <0>, <1>, <2>, <3>, <4>;
  48                 clocks = <&clock 3>, <&clock 344>;
  49                 clock-names = "fin_pll", "mct";
  50
  51                 mct_map: mct-map {
  52                         #interrupt-cells = <1>;
  53                         #address-cells = <0>;
  54                         #size-cells = <0>;
  55                         interrupt-map = <0 &gic 0 57 0>,
  56                                         <1 &combiner 12 5>,
  57                                         <2 &combiner 12 6>,
  58                                         <3 &combiner 12 7>,
  59                                         <4 &gic 1 12 0>;
  60                 };
  61         };
  62
  63         pinctrl_0: pinctrl@11400000 {
  64                 compatible = "samsung,exynos4x12-pinctrl";
  65                 reg = <0x11400000 0x1000>;
  66                 interrupts = <0 47 0>;
  67         };
  68
  69         pinctrl_1: pinctrl@11000000 {
  70                 compatible = "samsung,exynos4x12-pinctrl";
  71                 reg = <0x11000000 0x1000>;
  72                 interrupts = <0 46 0>;
  73
  74                 wakup_eint: wakeup-interrupt-controller {
  75                         compatible = "samsung,exynos4210-wakeup-eint";
  76                         interrupt-parent = <&gic>;
  77                         interrupts = <0 32 0>;
  78                 };
  79         };
  80
  81         pinctrl_2: pinctrl@03860000 {
  82                 compatible = "samsung,exynos4x12-pinctrl";
  83                 reg = <0x03860000 0x1000>;
  84                 interrupt-parent = <&combiner>;
  85                 interrupts = <10 0>;
  86         };
  87
  88         pinctrl_3: pinctrl@106E0000 {
  89                 compatible = "samsung,exynos4x12-pinctrl";
  90                 reg = <0x106E0000 0x1000>;
  91                 interrupts = <0 72 0>;
  92         };
  93
  94         g2d@10800000 {
  95                 compatible = "samsung,exynos4212-g2d";
  96                 reg = <0x10800000 0x1000>;
  97                 interrupts = <0 89 0>;
  98                 clocks = <&clock 177>, <&clock 277>;
  99                 clock-names = "sclk_fimg2d", "fimg2d";
 100                 status = "disabled";
 101         };
 102 };