1 // SPDX-License-Identifier: GPL-2.0+
3 * Samsung's Exynos4 SoC common device tree source
5 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
6 * http://www.samsung.com
9 #include "skeleton.dtsi"
23 combiner: interrupt-controller@10440000 {
24 compatible = "samsung,exynos4210-combiner";
25 #interrupt-cells = <2>;
27 reg = <0x10440000 0x1000>;
30 gic: interrupt-controller@10490000 {
31 compatible = "arm,cortex-a9-gic";
32 #interrupt-cells = <3>;
34 cpu-offset = <0x4000>;
35 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
38 serial_0: serial@13800000 {
39 compatible = "samsung,exynos4210-uart";
40 reg = <0x13800000 0x3c>;
44 serail_1: serial@13810000 {
45 compatible = "samsung,exynos4210-uart";
46 reg = <0x13810000 0x3c>;
50 serial_2: serial@13820000 {
51 compatible = "samsung,exynos4210-uart";
52 reg = <0x13820000 0x3c>;
56 serial_3: serial@13830000 {
57 compatible = "samsung,exynos4210-uart";
58 reg = <0x13830000 0x3c>;
62 serial_4: serial@13840000 {
63 compatible = "samsung,exynos4210-uart";
64 reg = <0x13840000 0x3c>;
71 compatible = "samsung,s3c2440-i2c";
72 reg = <0x13860000 0x100>;
73 interrupt-parent = <&gic>;
74 interrupts = <0 56 0>;
80 compatible = "samsung,s3c2440-i2c";
81 reg = <0x13870000 0x100>;
82 interrupt-parent = <&gic>;
83 interrupts = <1 57 0>;
89 compatible = "samsung,s3c2440-i2c";
90 reg = <0x13880000 0x100>;
91 interrupt-parent = <&gic>;
92 interrupts = <2 58 0>;
98 compatible = "samsung,s3c2440-i2c";
99 reg = <0x13890000 0x100>;
100 interrupt-parent = <&gic>;
101 interrupts = <3 59 0>;
104 i2c_4: i2c@138a0000 {
105 #address-cells = <1>;
107 compatible = "samsung,s3c2440-i2c";
108 reg = <0x138a0000 0x100>;
109 interrupt-parent = <&gic>;
110 interrupts = <4 60 0>;
113 i2c_5: i2c@138b0000 {
114 #address-cells = <1>;
116 compatible = "samsung,s3c2440-i2c";
117 reg = <0x138b0000 0x100>;
118 interrupt-parent = <&gic>;
119 interrupts = <5 61 0>;
122 i2c_6: i2c@138c0000 {
123 #address-cells = <1>;
125 compatible = "samsung,s3c2440-i2c";
126 reg = <0x138c0000 0x100>;
127 interrupt-parent = <&gic>;
128 interrupts = <6 62 0>;
131 i2c_7: i2c@138d0000 {
132 #address-cells = <1>;
134 compatible = "samsung,s3c2440-i2c";
135 reg = <0x138d0000 0x100>;
136 interrupt-parent = <&gic>;
137 interrupts = <7 63 0>;
140 sdhci0: sdhci@12510000 {
141 #address-cells = <1>;
143 compatible = "samsung,exynos4412-sdhci";
144 reg = <0x12510000 0x1000>;
145 interrupt-parent = <&gic>;
146 interrupts = <0 75 0>;
150 sdhci1: sdhci@12520000 {
151 #address-cells = <1>;
153 compatible = "samsung,exynos4412-sdhci";
154 reg = <0x12520000 0x1000>;
155 interrupt-parent = <&gic>;
156 interrupts = <0 76 0>;
160 sdhci2: sdhci@12530000 {
161 #address-cells = <1>;
163 compatible = "samsung,exynos4412-sdhci";
164 reg = <0x12530000 0x1000>;
165 interrupt-parent = <&gic>;
166 interrupts = <0 77 0>;
170 sdhci3: sdhci@12540000 {
171 #address-cells = <1>;
173 compatible = "samsung,exynos4412-sdhci";
174 reg = <0x12540000 0x1000>;
175 interrupt-parent = <&gic>;
176 interrupts = <0 78 0>;
180 mshc_0: dwmmc@12550000 {
181 #address-cells = <1>;
183 compatible = "samsung,exynos4412-dw-mshc";
184 reg = <0x12550000 0x1000>;
185 interrupt-parent = <&gic>;
186 interrupts = <0 131 0>;