2 * Samsung's Exynos4 SoC common device tree source
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
7 * SPDX-License-Identifier: GPL-2.0+
10 #include "skeleton.dtsi"
24 combiner: interrupt-controller@10440000 {
25 compatible = "samsung,exynos4210-combiner";
26 #interrupt-cells = <2>;
28 reg = <0x10440000 0x1000>;
32 compatible = "samsung,exynos4210-uart";
33 reg = <0x13800000 0x3c>;
38 compatible = "samsung,exynos4210-uart";
39 reg = <0x13810000 0x3c>;
44 compatible = "samsung,exynos4210-uart";
45 reg = <0x13820000 0x3c>;
50 compatible = "samsung,exynos4210-uart";
51 reg = <0x13830000 0x3c>;
56 compatible = "samsung,exynos4210-uart";
57 reg = <0x13840000 0x3c>;
64 compatible = "samsung,s3c2440-i2c";
65 reg = <0x13860000 0x100>;
66 interrupts = <0 56 0>;
72 compatible = "samsung,s3c2440-i2c";
73 reg = <0x13870000 0x100>;
74 interrupts = <1 57 0>;
80 compatible = "samsung,s3c2440-i2c";
81 reg = <0x13880000 0x100>;
82 interrupts = <2 58 0>;
88 compatible = "samsung,s3c2440-i2c";
89 reg = <0x13890000 0x100>;
90 interrupts = <3 59 0>;
96 compatible = "samsung,s3c2440-i2c";
97 reg = <0x138a0000 0x100>;
98 interrupts = <4 60 0>;
101 i2c_5: i2c@138b0000 {
102 #address-cells = <1>;
104 compatible = "samsung,s3c2440-i2c";
105 reg = <0x138b0000 0x100>;
106 interrupts = <5 61 0>;
109 i2c_6: i2c@138c0000 {
110 #address-cells = <1>;
112 compatible = "samsung,s3c2440-i2c";
113 reg = <0x138c0000 0x100>;
114 interrupts = <6 62 0>;
117 i2c_7: i2c@138d0000 {
118 #address-cells = <1>;
120 compatible = "samsung,s3c2440-i2c";
121 reg = <0x138d0000 0x100>;
122 interrupts = <7 63 0>;
125 sdhci0: sdhci@12510000 {
126 #address-cells = <1>;
128 compatible = "samsung,exynos4412-sdhci";
129 reg = <0x12510000 0x1000>;
130 interrupts = <0 75 0>;
134 sdhci1: sdhci@12520000 {
135 #address-cells = <1>;
137 compatible = "samsung,exynos4412-sdhci";
138 reg = <0x12520000 0x1000>;
139 interrupts = <0 76 0>;
143 sdhci2: sdhci@12530000 {
144 #address-cells = <1>;
146 compatible = "samsung,exynos4412-sdhci";
147 reg = <0x12530000 0x1000>;
148 interrupts = <0 77 0>;
152 sdhci3: sdhci@12540000 {
153 #address-cells = <1>;
155 compatible = "samsung,exynos4412-sdhci";
156 reg = <0x12540000 0x1000>;
157 interrupts = <0 78 0>;
161 mshc_0: dwmmc@12550000 {
162 #address-cells = <1>;
164 compatible = "samsung,exynos4412-dw-mshc";
165 reg = <0x12550000 0x1000>;
166 interrupts = <0 131 0>;