arch/arm/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC common device tree source
   3  *
   4  * Copyright (c) 2014 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include "skeleton.dtsi"
  11
  12 / {
  13         aliases {
  14                 i2c0 = &i2c_0;
  15                 i2c1 = &i2c_1;
  16                 i2c2 = &i2c_2;
  17                 i2c3 = &i2c_3;
  18                 i2c4 = &i2c_4;
  19                 i2c5 = &i2c_5;
  20                 i2c6 = &i2c_6;
  21                 i2c7 = &i2c_7;
  22         };
  23
  24         combiner: interrupt-controller@10440000 {
  25                 compatible = "samsung,exynos4210-combiner";
  26                 #interrupt-cells = <2>;
  27                 interrupt-controller;
  28                 reg = <0x10440000 0x1000>;
  29         };
  30
  31         gic: interrupt-controller@10490000 {
  32                 compatible = "arm,cortex-a9-gic";
  33                 #interrupt-cells = <3>;
  34                 interrupt-controller;
  35                 cpu-offset = <0x4000>;
  36                 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
  37         };
  38
  39         serial_0: serial@13800000 {
  40                 compatible = "samsung,exynos4210-uart";
  41                 reg = <0x13800000 0x3c>;
  42                 id = <0>;
  43         };
  44
  45         serail_1: serial@13810000 {
  46                 compatible = "samsung,exynos4210-uart";
  47                 reg = <0x13810000 0x3c>;
  48                 id = <1>;
  49         };
  50
  51         serial_2: serial@13820000 {
  52                 compatible = "samsung,exynos4210-uart";
  53                 reg = <0x13820000 0x3c>;
  54                 id = <2>;
  55         };
  56
  57         serial_3: serial@13830000 {
  58                 compatible = "samsung,exynos4210-uart";
  59                 reg = <0x13830000 0x3c>;
  60                 id = <3>;
  61         };
  62
  63         serial_4: serial@13840000 {
  64                 compatible = "samsung,exynos4210-uart";
  65                 reg = <0x13840000 0x3c>;
  66                 id = <4>;
  67         };
  68
  69         i2c_0: i2c@13860000 {
  70                 #address-cells = <1>;
  71                 #size-cells = <0>;
  72                 compatible = "samsung,s3c2440-i2c";
  73                 reg = <0x13860000 0x100>;
  74                 interrupt-parent = <&gic>;
  75                 interrupts = <0 56 0>;
  76         };
  77
  78         i2c_1: i2c@13870000 {
  79                 #address-cells = <1>;
  80                 #size-cells = <0>;
  81                 compatible = "samsung,s3c2440-i2c";
  82                 reg = <0x13870000 0x100>;
  83                 interrupt-parent = <&gic>;
  84                 interrupts = <1 57 0>;
  85         };
  86
  87         i2c_2: i2c@13880000 {
  88                 #address-cells = <1>;
  89                 #size-cells = <0>;
  90                 compatible = "samsung,s3c2440-i2c";
  91                 reg = <0x13880000 0x100>;
  92                 interrupt-parent = <&gic>;
  93                 interrupts = <2 58 0>;
  94         };
  95
  96         i2c_3: i2c@13890000 {
  97                 #address-cells = <1>;
  98                 #size-cells = <0>;
  99                 compatible = "samsung,s3c2440-i2c";
 100                 reg = <0x13890000 0x100>;
 101                 interrupt-parent = <&gic>;
 102                 interrupts = <3 59 0>;
 103         };
 104
 105         i2c_4: i2c@138a0000 {
 106                 #address-cells = <1>;
 107                 #size-cells = <0>;
 108                 compatible = "samsung,s3c2440-i2c";
 109                 reg = <0x138a0000 0x100>;
 110                 interrupt-parent = <&gic>;
 111                 interrupts = <4 60 0>;
 112         };
 113
 114         i2c_5: i2c@138b0000 {
 115                 #address-cells = <1>;
 116                 #size-cells = <0>;
 117                 compatible = "samsung,s3c2440-i2c";
 118                 reg = <0x138b0000 0x100>;
 119                 interrupt-parent = <&gic>;
 120                 interrupts = <5 61 0>;
 121         };
 122
 123         i2c_6: i2c@138c0000 {
 124                 #address-cells = <1>;
 125                 #size-cells = <0>;
 126                 compatible = "samsung,s3c2440-i2c";
 127                 reg = <0x138c0000 0x100>;
 128                 interrupt-parent = <&gic>;
 129                 interrupts = <6 62 0>;
 130         };
 131
 132         i2c_7: i2c@138d0000 {
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135                 compatible = "samsung,s3c2440-i2c";
 136                 reg = <0x138d0000 0x100>;
 137                 interrupt-parent = <&gic>;
 138                 interrupts = <7 63 0>;
 139         };
 140
 141         sdhci0: sdhci@12510000 {
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144                 compatible = "samsung,exynos4412-sdhci";
 145                 reg = <0x12510000 0x1000>;
 146                 interrupt-parent = <&gic>;
 147                 interrupts = <0 75 0>;
 148                 status = "disabled";
 149         };
 150
 151         sdhci1: sdhci@12520000 {
 152                 #address-cells = <1>;
 153                 #size-cells = <0>;
 154                 compatible = "samsung,exynos4412-sdhci";
 155                 reg = <0x12520000 0x1000>;
 156                 interrupt-parent = <&gic>;
 157                 interrupts = <0 76 0>;
 158                 status = "disabled";
 159         };
 160
 161         sdhci2: sdhci@12530000 {
 162                 #address-cells = <1>;
 163                 #size-cells = <0>;
 164                 compatible = "samsung,exynos4412-sdhci";
 165                 reg = <0x12530000 0x1000>;
 166                 interrupt-parent = <&gic>;
 167                 interrupts = <0 77 0>;
 168                 status = "disabled";
 169         };
 170
 171         sdhci3: sdhci@12540000 {
 172                 #address-cells = <1>;
 173                 #size-cells = <0>;
 174                 compatible = "samsung,exynos4412-sdhci";
 175                 reg = <0x12540000 0x1000>;
 176                 interrupt-parent = <&gic>;
 177                 interrupts = <0 78 0>;
 178                 status = "disabled";
 179         };
 180
 181         mshc_0: dwmmc@12550000 {
 182                 #address-cells = <1>;
 183                 #size-cells = <0>;
 184                 compatible = "samsung,exynos4412-dw-mshc";
 185                 reg = <0x12550000 0x1000>;
 186                 interrupt-parent = <&gic>;
 187                 interrupts = <0 131 0>;
 188                 status = "disabled";
 189         };
 190
 191 };