arch/arm/dts/da850.dtsi

   1 /*
   2  * Copyright 2012 DENX Software Engineering GmbH
   3  * Heiko Schocher <hs@denx.de>
   4  *
   5  * This program is free software; you can redistribute  it and/or modify it
   6  * under  the terms of  the GNU General  Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10 #include "skeleton.dtsi"
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12
  13 / {
  14         arm {
  15                 #address-cells = <1>;
  16                 #size-cells = <1>;
  17                 ranges;
  18                 intc: interrupt-controller@fffee000 {
  19                         compatible = "ti,cp-intc";
  20                         interrupt-controller;
  21                         #interrupt-cells = <1>;
  22                         ti,intc-size = <101>;
  23                         reg = <0xfffee000 0x2000>;
  24                 };
  25         };
  26
  27         aliases {
  28                 spi0 = &spi0;
  29         };
  30
  31         soc@1c00000 {
  32                 compatible = "simple-bus";
  33                 model = "da850";
  34                 #address-cells = <1>;
  35                 #size-cells = <1>;
  36                 ranges = <0x0 0x01c00000 0x400000>;
  37                 interrupt-parent = <&intc>;
  38
  39                 pmx_core: pinmux@14120 {
  40                         compatible = "pinctrl-single";
  41                         reg = <0x14120 0x50>;
  42                         #address-cells = <1>;
  43                         #size-cells = <0>;
  44                         #pinctrl-cells = <2>;
  45                         pinctrl-single,bit-per-mux;
  46                         pinctrl-single,register-width = <32>;
  47                         pinctrl-single,function-mask = <0xf>;
  48                         status = "disabled";
  49
  50                         serial0_rtscts_pins: pinmux_serial0_rtscts_pins {
  51                                 pinctrl-single,bits = <
  52                                         /* UART0_RTS UART0_CTS */
  53                                         0x0c 0x22000000 0xff000000
  54                                 >;
  55                         };
  56                         serial0_rxtx_pins: pinmux_serial0_rxtx_pins {
  57                                 pinctrl-single,bits = <
  58                                         /* UART0_TXD UART0_RXD */
  59                                         0x0c 0x00220000 0x00ff0000
  60                                 >;
  61                         };
  62                         serial1_rtscts_pins: pinmux_serial1_rtscts_pins {
  63                                 pinctrl-single,bits = <
  64                                         /* UART1_CTS UART1_RTS */
  65                                         0x00 0x00440000 0x00ff0000
  66                                 >;
  67                         };
  68                         serial1_rxtx_pins: pinmux_serial1_rxtx_pins {
  69                                 pinctrl-single,bits = <
  70                                         /* UART1_TXD UART1_RXD */
  71                                         0x10 0x22000000 0xff000000
  72                                 >;
  73                         };
  74                         serial2_rtscts_pins: pinmux_serial2_rtscts_pins {
  75                                 pinctrl-single,bits = <
  76                                         /* UART2_CTS UART2_RTS */
  77                                         0x00 0x44000000 0xff000000
  78                                 >;
  79                         };
  80                         serial2_rxtx_pins: pinmux_serial2_rxtx_pins {
  81                                 pinctrl-single,bits = <
  82                                         /* UART2_TXD UART2_RXD */
  83                                         0x10 0x00220000 0x00ff0000
  84                                 >;
  85                         };
  86                         i2c0_pins: pinmux_i2c0_pins {
  87                                 pinctrl-single,bits = <
  88                                         /* I2C0_SDA,I2C0_SCL */
  89                                         0x10 0x00002200 0x0000ff00
  90                                 >;
  91                         };
  92                         i2c1_pins: pinmux_i2c1_pins {
  93                                 pinctrl-single,bits = <
  94                                         /* I2C1_SDA, I2C1_SCL */
  95                                         0x10 0x00440000 0x00ff0000
  96                                 >;
  97                         };
  98                         mmc0_pins: pinmux_mmc_pins {
  99                                 pinctrl-single,bits = <
 100                                         /* MMCSD0_DAT[3] MMCSD0_DAT[2]
 101                                          * MMCSD0_DAT[1] MMCSD0_DAT[0]
 102                                          * MMCSD0_CMD    MMCSD0_CLK
 103                                          */
 104                                         0x28 0x00222222  0x00ffffff
 105                                 >;
 106                         };
 107                         ehrpwm0a_pins: pinmux_ehrpwm0a_pins {
 108                                 pinctrl-single,bits = <
 109                                         /* EPWM0A */
 110                                         0xc 0x00000002 0x0000000f
 111                                 >;
 112                         };
 113                         ehrpwm0b_pins: pinmux_ehrpwm0b_pins {
 114                                 pinctrl-single,bits = <
 115                                         /* EPWM0B */
 116                                         0xc 0x00000020 0x000000f0
 117                                 >;
 118                         };
 119                         ehrpwm1a_pins: pinmux_ehrpwm1a_pins {
 120                                 pinctrl-single,bits = <
 121                                         /* EPWM1A */
 122                                         0x14 0x00000002 0x0000000f
 123                                 >;
 124                         };
 125                         ehrpwm1b_pins: pinmux_ehrpwm1b_pins {
 126                                 pinctrl-single,bits = <
 127                                         /* EPWM1B */
 128                                         0x14 0x00000020 0x000000f0
 129                                 >;
 130                         };
 131                         ecap0_pins: pinmux_ecap0_pins {
 132                                 pinctrl-single,bits = <
 133                                         /* ECAP0_APWM0 */
 134                                         0x8 0x20000000 0xf0000000
 135                                 >;
 136                         };
 137                         ecap1_pins: pinmux_ecap1_pins {
 138                                 pinctrl-single,bits = <
 139                                         /* ECAP1_APWM1 */
 140                                         0x4 0x40000000 0xf0000000
 141                                 >;
 142                         };
 143                         ecap2_pins: pinmux_ecap2_pins {
 144                                 pinctrl-single,bits = <
 145                                         /* ECAP2_APWM2 */
 146                                         0x4 0x00000004 0x0000000f
 147                                 >;
 148                         };
 149                         spi0_pins: pinmux_spi0_pins {
 150                                 pinctrl-single,bits = <
 151                                         /* SIMO, SOMI, CLK */
 152                                         0xc 0x00001101 0x0000ff0f
 153                                 >;
 154                         };
 155                         spi0_cs0_pin: pinmux_spi0_cs0 {
 156                                 pinctrl-single,bits = <
 157                                         /* CS0 */
 158                                         0x10 0x00000010 0x000000f0
 159                                 >;
 160                         };
 161                         spi0_cs3_pin: pinmux_spi0_cs3_pin {
 162                                 pinctrl-single,bits = <
 163                                         /* CS3 */
 164                                         0xc 0x01000000 0x0f000000
 165                                 >;
 166                         };
 167                         spi1_pins: pinmux_spi1_pins {
 168                                 pinctrl-single,bits = <
 169                                         /* SIMO, SOMI, CLK */
 170                                         0x14 0x00110100 0x00ff0f00
 171                                 >;
 172                         };
 173                         spi1_cs0_pin: pinmux_spi1_cs0 {
 174                                 pinctrl-single,bits = <
 175                                         /* CS0 */
 176                                         0x14 0x00000010 0x000000f0
 177                                 >;
 178                         };
 179                         mdio_pins: pinmux_mdio_pins {
 180                                 pinctrl-single,bits = <
 181                                         /* MDIO_CLK, MDIO_D */
 182                                         0x10 0x00000088 0x000000ff
 183                                 >;
 184                         };
 185                         mii_pins: pinmux_mii_pins {
 186                                 pinctrl-single,bits = <
 187                                         /*
 188                                          * MII_TXEN, MII_TXCLK, MII_COL
 189                                          * MII_TXD_3, MII_TXD_2, MII_TXD_1
 190                                          * MII_TXD_0
 191                                          */
 192                                         0x8 0x88888880 0xfffffff0
 193                                         /*
 194                                          * MII_RXER, MII_CRS, MII_RXCLK
 195                                          * MII_RXDV, MII_RXD_3, MII_RXD_2
 196                                          * MII_RXD_1, MII_RXD_0
 197                                          */
 198                                         0xc 0x88888888 0xffffffff
 199                                 >;
 200                         };
 201                         lcd_pins: pinmux_lcd_pins {
 202                                 pinctrl-single,bits = <
 203                                         /*
 204                                          * LCD_D[2], LCD_D[3], LCD_D[4], LCD_D[5],
 205                                          * LCD_D[6], LCD_D[7]
 206                                          */
 207                                         0x40 0x22222200 0xffffff00
 208                                         /*
 209                                          * LCD_D[10], LCD_D[11], LCD_D[12], LCD_D[13],
 210                                          * LCD_D[14], LCD_D[15], LCD_D[0], LCD_D[1]
 211                                          */
 212                                         0x44 0x22222222 0xffffffff
 213                                         /* LCD_D[8], LCD_D[9] */
 214                                         0x48 0x00000022 0x000000ff
 215
 216                                         /* LCD_PCLK */
 217                                         0x48 0x02000000 0x0f000000
 218                                         /* LCD_AC_ENB_CS, LCD_VSYNC, LCD_HSYNC */
 219                                         0x4c 0x02000022 0x0f0000ff
 220                                 >;
 221                         };
 222                         vpif_capture_pins: vpif_capture_pins {
 223                                 pinctrl-single,bits = <
 224                                         /* VP_DIN[2..7], VP_CLKIN1, VP_CLKIN0 */
 225                                         0x38 0x11111111 0xffffffff
 226                                         /* VP_DIN[10..15,0..1] */
 227                                         0x3c 0x11111111 0xffffffff
 228                                         /* VP_DIN[8..9] */
 229                                         0x40 0x00000011 0x000000ff
 230                                 >;
 231                         };
 232                         vpif_display_pins: vpif_display_pins {
 233                                 pinctrl-single,bits = <
 234                                         /* VP_DOUT[2..7] */
 235                                         0x40 0x11111100 0xffffff00
 236                                         /* VP_DOUT[10..15,0..1] */
 237                                         0x44 0x11111111 0xffffffff
 238                                         /*  VP_DOUT[8..9] */
 239                                         0x48 0x00000011 0x000000ff
 240                                         /*
 241                                          * VP_CLKOUT3, VP_CLKIN3,
 242                                          * VP_CLKOUT2, VP_CLKIN2
 243                                          */
 244                                         0x4c 0x00111100 0x00ffff00
 245                                 >;
 246                         };
 247                 };
 248                 prictrl: priority-controller@14110 {
 249                         compatible = "ti,da850-mstpri";
 250                         reg = <0x14110 0x0c>;
 251                         status = "disabled";
 252                 };
 253                 cfgchip: chip-controller@1417c {
 254                         compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
 255                         reg = <0x1417c 0x14>;
 256
 257                         usb_phy: usb-phy {
 258                                 compatible = "ti,da830-usb-phy";
 259                                 #phy-cells = <1>;
 260                                 status = "disabled";
 261                         };
 262                 };
 263                 edma0: edma@0 {
 264                         compatible = "ti,edma3-tpcc";
 265                         /* eDMA3 CC0: 0x01c0 0000 - 0x01c0 7fff */
 266                         reg =   <0x0 0x8000>;
 267                         reg-names = "edma3_cc";
 268                         interrupts = <11 12>;
 269                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 270                         #dma-cells = <2>;
 271
 272                         ti,tptcs = <&edma0_tptc0 7>, <&edma0_tptc1 0>;
 273                 };
 274                 edma0_tptc0: tptc@8000 {
 275                         compatible = "ti,edma3-tptc";
 276                         reg =   <0x8000 0x400>;
 277                         interrupts = <13>;
 278                         interrupt-names = "edm3_tcerrint";
 279                 };
 280                 edma0_tptc1: tptc@8400 {
 281                         compatible = "ti,edma3-tptc";
 282                         reg =   <0x8400 0x400>;
 283                         interrupts = <32>;
 284                         interrupt-names = "edm3_tcerrint";
 285                 };
 286                 edma1: edma@230000 {
 287                         compatible = "ti,edma3-tpcc";
 288                         /* eDMA3 CC1: 0x01e3 0000 - 0x01e3 7fff */
 289                         reg =   <0x230000 0x8000>;
 290                         reg-names = "edma3_cc";
 291                         interrupts = <93 94>;
 292                         interrupt-names = "edma3_ccint", "edma3_ccerrint";
 293                         #dma-cells = <2>;
 294
 295                         ti,tptcs = <&edma1_tptc0 7>;
 296                 };
 297                 edma1_tptc0: tptc@238000 {
 298                         compatible = "ti,edma3-tptc";
 299                         reg =   <0x238000 0x400>;
 300                         interrupts = <95>;
 301                         interrupt-names = "edm3_tcerrint";
 302                 };
 303                 serial0: serial@42000 {
 304                         compatible = "ti,da830-uart", "ns16550a";
 305                         reg = <0x42000 0x100>;
 306                         reg-io-width = <4>;
 307                         reg-shift = <2>;
 308                         interrupts = <25>;
 309                         status = "disabled";
 310                 };
 311                 serial1: serial@10c000 {
 312                         compatible = "ti,da830-uart", "ns16550a";
 313                         reg = <0x10c000 0x100>;
 314                         reg-io-width = <4>;
 315                         reg-shift = <2>;
 316                         interrupts = <53>;
 317                         status = "disabled";
 318                 };
 319                 serial2: serial@10d000 {
 320                         compatible = "ti,da830-uart", "ns16550a";
 321                         reg = <0x10d000 0x100>;
 322                         reg-io-width = <4>;
 323                         reg-shift = <2>;
 324                         interrupts = <61>;
 325                         status = "disabled";
 326                 };
 327                 rtc0: rtc@23000 {
 328                         compatible = "ti,da830-rtc";
 329                         reg = <0x23000 0x1000>;
 330                         interrupts = <19
 331                                       19>;
 332                         status = "disabled";
 333                 };
 334                 i2c0: i2c@22000 {
 335                         compatible = "ti,davinci-i2c";
 336                         reg = <0x22000 0x1000>;
 337                         interrupts = <15>;
 338                         #address-cells = <1>;
 339                         #size-cells = <0>;
 340                         status = "disabled";
 341                 };
 342                 i2c1: i2c@228000 {
 343                         compatible = "ti,davinci-i2c";
 344                         reg = <0x228000 0x1000>;
 345                         interrupts = <51>;
 346                         #address-cells = <1>;
 347                         #size-cells = <0>;
 348                         status = "disabled";
 349                 };
 350                 wdt: wdt@21000 {
 351                         compatible = "ti,davinci-wdt";
 352                         reg = <0x21000 0x1000>;
 353                         status = "disabled";
 354                 };
 355                 mmc0: mmc@40000 {
 356                         compatible = "ti,da830-mmc";
 357                         reg = <0x40000 0x1000>;
 358                         cap-sd-highspeed;
 359                         cap-mmc-highspeed;
 360                         interrupts = <16>;
 361                         dmas = <&edma0 16 0>, <&edma0 17 0>;
 362                         dma-names = "rx", "tx";
 363                         status = "disabled";
 364                 };
 365                 vpif: video@217000 {
 366                         compatible = "ti,da850-vpif";
 367                         reg = <0x217000 0x1000>;
 368                         interrupts = <92>;
 369                         status = "disabled";
 370
 371                         /* VPIF capture port */
 372                         port@0 {
 373                                 #address-cells = <1>;
 374                                 #size-cells = <0>;
 375                         };
 376
 377                         /* VPIF display port */
 378                         port@1 {
 379                                 #address-cells = <1>;
 380                                 #size-cells = <0>;
 381                         };
 382                 };
 383                 mmc1: mmc@21b000 {
 384                         compatible = "ti,da830-mmc";
 385                         reg = <0x21b000 0x1000>;
 386                         cap-sd-highspeed;
 387                         cap-mmc-highspeed;
 388                         interrupts = <72>;
 389                         dmas = <&edma1 28 0>, <&edma1 29 0>;
 390                         dma-names = "rx", "tx";
 391                         status = "disabled";
 392                 };
 393                 ehrpwm0: pwm@300000 {
 394                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 395                                      "ti,am33xx-ehrpwm";
 396                         #pwm-cells = <3>;
 397                         reg = <0x300000 0x2000>;
 398                         status = "disabled";
 399                 };
 400                 ehrpwm1: pwm@302000 {
 401                         compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm",
 402                                      "ti,am33xx-ehrpwm";
 403                         #pwm-cells = <3>;
 404                         reg = <0x302000 0x2000>;
 405                         status = "disabled";
 406                 };
 407                 ecap0: ecap@306000 {
 408                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 409                                      "ti,am33xx-ecap";
 410                         #pwm-cells = <3>;
 411                         reg = <0x306000 0x80>;
 412                         status = "disabled";
 413                 };
 414                 ecap1: ecap@307000 {
 415                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 416                                      "ti,am33xx-ecap";
 417                         #pwm-cells = <3>;
 418                         reg = <0x307000 0x80>;
 419                         status = "disabled";
 420                 };
 421                 ecap2: ecap@308000 {
 422                         compatible = "ti,da850-ecap", "ti,am3352-ecap",
 423                                      "ti,am33xx-ecap";
 424                         #pwm-cells = <3>;
 425                         reg = <0x308000 0x80>;
 426                         status = "disabled";
 427                 };
 428                 spi0: spi@41000 {
 429                         #address-cells = <1>;
 430                         #size-cells = <0>;
 431                         compatible = "ti,da830-spi";
 432                         reg = <0x41000 0x1000>;
 433                         num-cs = <6>;
 434                         ti,davinci-spi-intr-line = <1>;
 435                         interrupts = <20>;
 436                         dmas = <&edma0 14 0>, <&edma0 15 0>;
 437                         dma-names = "rx", "tx";
 438                         status = "disabled";
 439                 };
 440                 spi1: spi@30e000 {
 441                         #address-cells = <1>;
 442                         #size-cells = <0>;
 443                         compatible = "ti,da830-spi";
 444                         reg = <0x30e000 0x1000>;
 445                         num-cs = <4>;
 446                         ti,davinci-spi-intr-line = <1>;
 447                         interrupts = <56>;
 448                         dmas = <&edma0 18 0>, <&edma0 19 0>;
 449                         dma-names = "rx", "tx";
 450                         status = "disabled";
 451                 };
 452                 usb0: usb@200000 {
 453                         compatible = "ti,da830-musb";
 454                         reg = <0x200000 0x1000>;
 455                         ranges;
 456                         interrupts = <58>;
 457                         interrupt-names = "mc";
 458                         dr_mode = "otg";
 459                         phys = <&usb_phy 0>;
 460                         phy-names = "usb-phy";
 461                         status = "disabled";
 462
 463                         #address-cells = <1>;
 464                         #size-cells = <1>;
 465
 466                         dmas = <&cppi41dma 0 0 &cppi41dma 1 0
 467                                 &cppi41dma 2 0 &cppi41dma 3 0
 468                                 &cppi41dma 0 1 &cppi41dma 1 1
 469                                 &cppi41dma 2 1 &cppi41dma 3 1>;
 470                         dma-names =
 471                                 "rx1", "rx2", "rx3", "rx4",
 472                                 "tx1", "tx2", "tx3", "tx4";
 473
 474                         cppi41dma: dma-controller@201000 {
 475                                 compatible = "ti,da830-cppi41";
 476                                 reg =  <0x201000 0x1000
 477                                         0x202000 0x1000
 478                                         0x204000 0x4000>;
 479                                 reg-names = "controller",
 480                                             "scheduler", "queuemgr";
 481                                 interrupts = <58>;
 482                                 #dma-cells = <2>;
 483                                 #dma-channels = <4>;
 484                                 status = "okay";
 485                         };
 486                 };
 487                 sata: sata@218000 {
 488                         compatible = "ti,da850-ahci";
 489                         reg = <0x218000 0x2000>, <0x22c018 0x4>;
 490                         interrupts = <67>;
 491                         status = "disabled";
 492                 };
 493                 mdio: mdio@224000 {
 494                         compatible = "ti,davinci_mdio";
 495                         #address-cells = <1>;
 496                         #size-cells = <0>;
 497                         reg = <0x224000 0x1000>;
 498                         status = "disabled";
 499                 };
 500                 eth0: ethernet@220000 {
 501                         compatible = "ti,davinci-dm6467-emac";
 502                         reg = <0x220000 0x4000>;
 503                         ti,davinci-ctrl-reg-offset = <0x3000>;
 504                         ti,davinci-ctrl-mod-reg-offset = <0x2000>;
 505                         ti,davinci-ctrl-ram-offset = <0>;
 506                         ti,davinci-ctrl-ram-size = <0x2000>;
 507                         local-mac-address = [ 00 00 00 00 00 00 ];
 508                         interrupts = <33
 509                                         34
 510                                         35
 511                                         36
 512                                         >;
 513                         status = "disabled";
 514                 };
 515                 usb1: usb@225000 {
 516                         compatible = "ti,da830-ohci";
 517                         reg = <0x225000 0x1000>;
 518                         interrupts = <59>;
 519                         phys = <&usb_phy 1>;
 520                         phy-names = "usb-phy";
 521                         status = "disabled";
 522                 };
 523                 gpio: gpio@226000 {
 524                         compatible = "ti,dm6441-gpio";
 525                         gpio-controller;
 526                         #gpio-cells = <2>;
 527                         reg = <0x226000 0x1000>;
 528                         interrupts = <42 IRQ_TYPE_EDGE_BOTH
 529                                 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
 530                                 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
 531                                 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
 532                                 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
 533                         ti,ngpio = <144>;
 534                         ti,davinci-gpio-unbanked = <0>;
 535                         status = "disabled";
 536                         interrupt-controller;
 537                         #interrupt-cells = <2>;
 538                 };
 539                 pinconf: pin-controller@22c00c {
 540                         compatible = "ti,da850-pupd";
 541                         reg = <0x22c00c 0x8>;
 542                         status = "disabled";
 543                 };
 544
 545                 mcasp0: mcasp@100000 {
 546                         compatible = "ti,da830-mcasp-audio";
 547                         reg = <0x100000 0x2000>,
 548                               <0x102000 0x400000>;
 549                         reg-names = "mpu", "dat";
 550                         interrupts = <54>;
 551                         interrupt-names = "common";
 552                         status = "disabled";
 553                         dmas = <&edma0 1 1>,
 554                                 <&edma0 0 1>;
 555                         dma-names = "tx", "rx";
 556                 };
 557
 558                 lcdc: display@213000 {
 559                         compatible = "ti,da850-tilcdc";
 560                         reg = <0x213000 0x1000>;
 561                         interrupts = <52>;
 562                         max-pixelclock = <37500>;
 563                         status = "disabled";
 564                 };
 565         };
 566         aemif: aemif@68000000 {
 567                 compatible = "ti,da850-aemif";
 568                 #address-cells = <2>;
 569                 #size-cells = <1>;
 570
 571                 reg = <0x68000000 0x00008000>;
 572                 ranges = <0 0 0x60000000 0x08000000
 573                           1 0 0x68000000 0x00008000>;
 574                 status = "disabled";
 575         };
 576         memctrl: memory-controller@b0000000 {
 577                 compatible = "ti,da850-ddr-controller";
 578                 reg = <0xb0000000 0xe8>;
 579                 status = "disabled";
 580         };
 581 };