Merge tag 'efi-2020-07-rc2-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
[oweals/u-boot.git] / arch / arm / dts / ca-presidio-engboard.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2020, Cortina Access Inc.
4  */
5
6 /dts-v1/;
7
8 / {
9    #address-cells = <2>;
10    #size-cells = <1>;
11
12         mmc0: mmc@f4400000 {
13                 compatible = "snps,dw-cortina";
14                 reg = <0x0 0xf4400000 0x1000>;
15                 bus-width = <4>;
16                 io_ds = <0x77>;
17                 fifo-mode;
18                 sd_dll_ctrl = <0xf43200e8>;
19                 io_drv_ctrl = <0xf432004c>;
20         };
21
22         gpio0: gpio-controller@0xf4329280  {
23                 compatible = "cortina,ca-gpio";
24                 reg = <0x0 0xf4329280 0x24>;
25                 gpio-controller;
26                 #gpio-cells = <2>;
27                 status = "okay";
28         };
29         gpio1: gpio-controller@0xf43292a4  {
30                 compatible = "cortina,ca-gpio";
31                 reg = <0x0 0xf43292a4 0x24>;
32                 gpio-controller;
33                 #gpio-cells = <2>;
34                 status = "disabled";
35         };
36
37         watchdog: watchdog@0xf432901c {
38                 compatible = "cortina,ca-wdt";
39                 reg = <0x0 0xf432901c 0x34>,
40                       <0x0 0xf4320020 0x04>;
41                 status = "okay";
42         };
43
44         uart0: serial@0xf4329148  {
45                 u-boot,dm-pre-reloc;
46                 compatible = "cortina,ca-uart";
47                 reg = <0x0 0xf4329148 0x30>;
48                 status = "okay";
49         };
50
51         i2c: i2c@f4329120 {
52                 compatible = "cortina,ca-i2c";
53                 reg = <0x0 0xf4329120 0x28>;
54                 clock-frequency = <400000>;
55         };
56
57         sflash: sflash-controller@f4324000 {
58                 #address-cells = <2>;
59                 #size-cells = <1>;
60                 compatible = "cortina,ca-sflash";
61                 reg = <0x0 0xf4324000 0x50>;
62                 reg-names = "sflash-regs";
63                 flash@0 {
64                         compatible = "jedec,spi-nor";
65                         spi-rx-bus-width = <1>;
66                         spi-max-frequency = <108000000>;
67                 };
68         };
69 };