1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Philippe Reynes <philippe.reynes@softathome.com>
6 #include "skeleton64.dtsi"
9 compatible = "brcm,bcm6858";
19 compatible = "arm,cortex-a53", "arm,armv8";
22 next-level-cache = <&l2>;
27 compatible = "arm,cortex-a53", "arm,armv8";
30 next-level-cache = <&l2>;
35 compatible = "arm,cortex-a53", "arm,armv8";
38 next-level-cache = <&l2>;
43 compatible = "arm,cortex-a53", "arm,armv8";
46 next-level-cache = <&l2>;
57 compatible = "simple-bus";
63 periph_osc: periph-osc {
64 compatible = "fixed-clock";
66 clock-frequency = <200000000>;
72 compatible = "simple-bus";
77 uart0: serial@ff800640 {
78 compatible = "brcm,bcm6345-uart";
79 reg = <0x0 0xff800640 0x0 0x18>;
80 clocks = <&periph_osc>;
85 leds: led-controller@ff800800 {
86 compatible = "brcm,bcm6858-leds";
87 reg = <0x0 0xff800800 0x0 0xe4>;
92 wdt1: watchdog@ff802780 {
93 compatible = "brcm,bcm6345-wdt";
94 reg = <0x0 0xff802780 0x0 0x14>;
95 clocks = <&periph_osc>;
98 wdt2: watchdog@ff8027c0 {
99 compatible = "brcm,bcm6345-wdt";
100 reg = <0x0 0xff8027c0 0x0 0x14>;
101 clocks = <&periph_osc>;
105 compatible = "wdt-reboot";
109 gpio0: gpio-controller@0xff800500 {
110 compatible = "brcm,bcm6345-gpio";
111 reg = <0x0 0xff800500 0x0 0x4>,
112 <0x0 0xff800520 0x0 0x4>;
119 gpio1: gpio-controller@0xff800504 {
120 compatible = "brcm,bcm6345-gpio";
121 reg = <0x0 0xff800504 0x0 0x4>,
122 <0x0 0xff800524 0x0 0x4>;
129 gpio2: gpio-controller@0xff800508 {
130 compatible = "brcm,bcm6345-gpio";
131 reg = <0x0 0xff800508 0x0 0x4>,
132 <0x0 0xff800528 0x0 0x4>;
139 gpio3: gpio-controller@0xff80050c {
140 compatible = "brcm,bcm6345-gpio";
141 reg = <0x0 0xff80050c 0x0 0x4>,
142 <0x0 0xff80052c 0x0 0x4>;
149 gpio4: gpio-controller@0xff800510 {
150 compatible = "brcm,bcm6345-gpio";
151 reg = <0x0 0xff800510 0x0 0x4>,
152 <0x0 0xff800530 0x0 0x4>;
159 gpio5: gpio-controller@0xff800514 {
160 compatible = "brcm,bcm6345-gpio";
161 reg = <0x0 0xff800514 0x0 0x4>,
162 <0x0 0xff800534 0x0 0x4>;
169 gpio6: gpio-controller@0xff800518 {
170 compatible = "brcm,bcm6345-gpio";
171 reg = <0x0 0xff800518 0x0 0x4>,
172 <0x0 0xff800538 0x0 0x4>;
179 gpio7: gpio-controller@0xff80051c {
180 compatible = "brcm,bcm6345-gpio";
181 reg = <0x0 0xff80051c 0x0 0x4>,
182 <0x0 0xff80053c 0x0 0x4>;
189 nand: nand-controller@ff801800 {
190 compatible = "brcm,nand-bcm6858",
191 "brcm,brcmnand-v5.0",
193 reg-names = "nand", "nand-int-base", "nand-cache";
194 reg = <0x0 0xff801800 0x0 0x180>,
195 <0x0 0xff802000 0x0 0x10>,
196 <0x0 0xff801c00 0x0 0x200>;
197 parameter-page-big-endian = <0>;