arch/arm/dts/bcm63158.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2019 Philippe Reynes <philippe.reynes@softathome.com>
   4  */
   5
   6 #include "skeleton64.dtsi"
   7
   8 / {
   9         compatible = "brcm,bcm63158";
  10         #address-cells = <2>;
  11         #size-cells = <2>;
  12
  13         cpus {
  14                 #address-cells = <2>;
  15                 #size-cells = <0>;
  16                 u-boot,dm-pre-reloc;
  17
  18                 cpu0: cpu@0 {
  19                         compatible = "arm,cortex-a53", "arm,armv8";
  20                         device_type = "cpu";
  21                         reg = <0x0 0x0>;
  22                         next-level-cache = <&l2>;
  23                         u-boot,dm-pre-reloc;
  24                 };
  25
  26                 cpu1: cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         reg = <0x0 0x1>;
  30                         next-level-cache = <&l2>;
  31                         u-boot,dm-pre-reloc;
  32                 };
  33
  34                 cpu2: cpu@2 {
  35                         compatible = "arm,cortex-a53", "arm,armv8";
  36                         device_type = "cpu";
  37                         reg = <0x0 0x2>;
  38                         next-level-cache = <&l2>;
  39                         u-boot,dm-pre-reloc;
  40                 };
  41
  42                 cpu3: cpu@3 {
  43                         compatible = "arm,cortex-a53", "arm,armv8";
  44                         device_type = "cpu";
  45                         reg = <0x0 0x3>;
  46                         next-level-cache = <&l2>;
  47                         u-boot,dm-pre-reloc;
  48                 };
  49
  50                 l2: l2-cache0 {
  51                         compatible = "cache";
  52                         u-boot,dm-pre-reloc;
  53                 };
  54         };
  55
  56         clocks {
  57                 compatible = "simple-bus";
  58                 #address-cells = <2>;
  59                 #size-cells = <2>;
  60                 ranges;
  61                 u-boot,dm-pre-reloc;
  62
  63                 periph_osc: periph-osc {
  64                         compatible = "fixed-clock";
  65                         #clock-cells = <0>;
  66                         clock-frequency = <0xbebc200>;
  67                         u-boot,dm-pre-reloc;
  68                 };
  69         };
  70
  71         ubus {
  72                 compatible = "simple-bus";
  73                 #address-cells = <2>;
  74                 #size-cells = <2>;
  75                 u-boot,dm-pre-reloc;
  76
  77                 uart0: serial@ff812000 {
  78                         compatible = "arm,pl011", "arm,primecell";
  79                         reg = <0x0 0xff812000 0x0 0x1000>;
  80                         clock = <50000000>;
  81
  82                         status = "disabled";
  83                 };
  84
  85                 wdt1: watchdog@ff800480 {
  86                         compatible = "brcm,bcm6345-wdt";
  87                         reg = <0x0 0xff800480 0x0 0x14>;
  88                         clocks = <&periph_osc>;
  89                 };
  90
  91                 wdt2: watchdog@ff8004c0 {
  92                         compatible = "brcm,bcm6345-wdt";
  93                         reg = <0x0 0xff8004c0 0x0 0x14>;
  94                         clocks = <&periph_osc>;
  95                 };
  96
  97                 wdt-reboot {
  98                         compatible = "wdt-reboot";
  99                         wdt = <&wdt1>;
 100                 };
 101
 102                 gpio0: gpio-controller@0xff800500 {
 103                         compatible = "brcm,bcm6345-gpio";
 104                         reg = <0x0 0xff800500 0x0 0x4>,
 105                               <0x0 0xff800520 0x0 0x4>;
 106                         gpio-controller;
 107                         #gpio-cells = <2>;
 108
 109                         status = "disabled";
 110                 };
 111
 112                 gpio1: gpio-controller@0xff800504 {
 113                         compatible = "brcm,bcm6345-gpio";
 114                         reg = <0x0 0xff800504 0x0 0x4>,
 115                               <0x0 0xff800524 0x0 0x4>;
 116                         gpio-controller;
 117                         #gpio-cells = <2>;
 118
 119                         status = "disabled";
 120                 };
 121
 122                 gpio2: gpio-controller@0xff800508 {
 123                         compatible = "brcm,bcm6345-gpio";
 124                         reg = <0x0 0xff800508 0x0 0x4>,
 125                               <0x0 0xff800528 0x0 0x4>;
 126                         gpio-controller;
 127                         #gpio-cells = <2>;
 128
 129                         status = "disabled";
 130                 };
 131
 132                 gpio3: gpio-controller@0xff80050c {
 133                         compatible = "brcm,bcm6345-gpio";
 134                         reg = <0x0 0xff80050c 0x0 0x4>,
 135                               <0x0 0xff80052c 0x0 0x4>;
 136                         gpio-controller;
 137                         #gpio-cells = <2>;
 138
 139                         status = "disabled";
 140                 };
 141
 142                 gpio4: gpio-controller@0xff800510 {
 143                         compatible = "brcm,bcm6345-gpio";
 144                         reg = <0x0 0xff800510 0x0 0x4>,
 145                               <0x0 0xff800530 0x0 0x4>;
 146                         gpio-controller;
 147                         #gpio-cells = <2>;
 148
 149                         status = "disabled";
 150                 };
 151
 152                 gpio5: gpio-controller@0xff800514 {
 153                         compatible = "brcm,bcm6345-gpio";
 154                         reg = <0x0 0xff800514 0x0 0x4>,
 155                               <0x0 0xff800534 0x0 0x4>;
 156                         gpio-controller;
 157                         #gpio-cells = <2>;
 158
 159                         status = "disabled";
 160                 };
 161
 162                 gpio6: gpio-controller@0xff800518 {
 163                         compatible = "brcm,bcm6345-gpio";
 164                         reg = <0x0 0xff800518 0x0 0x4>,
 165                               <0x0 0xff800538 0x0 0x4>;
 166                         gpio-controller;
 167                         #gpio-cells = <2>;
 168
 169                         status = "disabled";
 170                 };
 171
 172                 gpio7: gpio-controller@0xff80051c {
 173                         compatible = "brcm,bcm6345-gpio";
 174                         reg = <0x0 0xff80051c 0x0 0x4>,
 175                               <0x0 0xff80053c 0x0 0x4>;
 176                         gpio-controller;
 177                         #gpio-cells = <2>;
 178
 179                         status = "disabled";
 180                 };
 181         };
 182 };