arch/arm/dts/at91sam9n12.dtsi

   1 /*
   2  * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
   3  *
   4  *  Copyright (C) 2012 Atmel,
   5  *                2012 Hong Xu <hong.xu@atmel.com>
   6  *
   7  * Licensed under GPLv2 or later.
   8  */
   9
  10 #include "skeleton.dtsi"
  11 #include <dt-bindings/dma/at91.h>
  12 #include <dt-bindings/pinctrl/at91.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/clock/at91.h>
  16
  17 / {
  18         model = "Atmel AT91SAM9N12 SoC";
  19         compatible = "atmel,at91sam9n12";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 gpio0 = &pioA;
  29                 gpio1 = &pioB;
  30                 gpio2 = &pioC;
  31                 gpio3 = &pioD;
  32                 tcb0 = &tcb0;
  33                 tcb1 = &tcb1;
  34                 i2c0 = &i2c0;
  35                 i2c1 = &i2c1;
  36                 ssc0 = &ssc0;
  37                 pwm0 = &pwm0;
  38                 spi0 = &spi0;
  39         };
  40         cpus {
  41                 cpu {
  42                         compatible = "arm,arm926ej-s";
  43                         device_type = "cpu";
  44                 };
  45         };
  46
  47         memory {
  48                 reg = <0x20000000 0x10000000>;
  49         };
  50
  51         clocks {
  52                 slow_xtal: slow_xtal {
  53                         compatible = "fixed-clock";
  54                         #clock-cells = <0>;
  55                         clock-frequency = <0>;
  56                 };
  57
  58                 main_xtal: main_xtal {
  59                         compatible = "fixed-clock";
  60                         #clock-cells = <0>;
  61                         clock-frequency = <0>;
  62                 };
  63         };
  64
  65         sram: sram@00300000 {
  66                 compatible = "mmio-sram";
  67                 reg = <0x00300000 0x8000>;
  68         };
  69
  70         ahb {
  71                 compatible = "simple-bus";
  72                 #address-cells = <1>;
  73                 #size-cells = <1>;
  74                 ranges;
  75                 u-boot,dm-pre-reloc;
  76
  77                 apb {
  78                         compatible = "simple-bus";
  79                         #address-cells = <1>;
  80                         #size-cells = <1>;
  81                         ranges;
  82                         u-boot,dm-pre-reloc;
  83
  84                         aic: interrupt-controller@fffff000 {
  85                                 #interrupt-cells = <3>;
  86                                 compatible = "atmel,at91rm9200-aic";
  87                                 interrupt-controller;
  88                                 reg = <0xfffff000 0x200>;
  89                                 atmel,external-irqs = <31>;
  90                         };
  91
  92                         ramc0: ramc@ffffe800 {
  93                                 compatible = "atmel,at91sam9g45-ddramc";
  94                                 reg = <0xffffe800 0x200>;
  95                                 clocks = <&ddrck>;
  96                                 clock-names = "ddrck";
  97                         };
  98
  99                         pmc: pmc@fffffc00 {
 100                                 compatible = "atmel,at91sam9n12-pmc", "syscon";
 101                                 reg = <0xfffffc00 0x200>;
 102                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 103                                 interrupt-controller;
 104                                 #address-cells = <1>;
 105                                 #size-cells = <0>;
 106                                 #interrupt-cells = <1>;
 107                                 u-boot,dm-pre-reloc;
 108
 109                                 main_rc_osc: main_rc_osc {
 110                                         compatible = "atmel,at91sam9x5-clk-main-rc-osc";
 111                                         #clock-cells = <0>;
 112                                         interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
 113                                         clock-frequency = <12000000>;
 114                                         clock-accuracy = <50000000>;
 115                                 };
 116
 117                                 main_osc: main_osc {
 118                                         compatible = "atmel,at91rm9200-clk-main-osc";
 119                                         #clock-cells = <0>;
 120                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 121                                         clocks = <&main_xtal>;
 122                                 };
 123
 124                                 main: mainck {
 125                                         compatible = "atmel,at91sam9x5-clk-main";
 126                                         #clock-cells = <0>;
 127                                         interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
 128                                         clocks = <&main_rc_osc>, <&main_osc>;
 129                                 };
 130
 131                                 plla: pllack@0 {
 132                                         compatible = "atmel,at91rm9200-clk-pll";
 133                                         #clock-cells = <0>;
 134                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 135                                         clocks = <&main>;
 136                                         reg = <0>;
 137                                         atmel,clk-input-range = <2000000 32000000>;
 138                                         #atmel,pll-clk-output-range-cells = <4>;
 139                                         atmel,pll-clk-output-ranges = <745000000 800000000 0 0>,
 140                                                                       <695000000 750000000 1 0>,
 141                                                                       <645000000 700000000 2 0>,
 142                                                                       <595000000 650000000 3 0>,
 143                                                                       <545000000 600000000 0 1>,
 144                                                                       <495000000 555000000 1 1>,
 145                                                                       <445000000 500000000 2 1>,
 146                                                                       <400000000 450000000 3 1>;
 147                                 };
 148
 149                                 plladiv: plladivck {
 150                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 151                                         #clock-cells = <0>;
 152                                         clocks = <&plla>;
 153                                 };
 154
 155                                 pllb: pllbck@1 {
 156                                         compatible = "atmel,at91rm9200-clk-pll";
 157                                         #clock-cells = <0>;
 158                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 159                                         clocks = <&main>;
 160                                         reg = <1>;
 161                                         atmel,clk-input-range = <2000000 32000000>;
 162                                         #atmel,pll-clk-output-range-cells = <3>;
 163                                         atmel,pll-clk-output-ranges = <30000000 100000000 0>;
 164                                 };
 165
 166                                 mck: masterck {
 167                                         compatible = "atmel,at91sam9x5-clk-master";
 168                                         #clock-cells = <0>;
 169                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 170                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>;
 171                                         atmel,clk-output-range = <0 133333333>;
 172                                         atmel,clk-divisors = <1 2 4 3>;
 173                                         atmel,master-clk-have-div3-pres;
 174                                         u-boot,dm-pre-reloc;
 175                                 };
 176
 177                                 usb: usbck {
 178                                         compatible = "atmel,at91sam9n12-clk-usb";
 179                                         #clock-cells = <0>;
 180                                         clocks = <&pllb>;
 181                                 };
 182
 183                                 prog: progck {
 184                                         compatible = "atmel,at91sam9x5-clk-programmable";
 185                                         #address-cells = <1>;
 186                                         #size-cells = <0>;
 187                                         interrupt-parent = <&pmc>;
 188                                         clocks = <&clk32k>, <&main>, <&plladiv>, <&pllb>, <&mck>;
 189
 190                                         prog0: prog@0 {
 191                                                 #clock-cells = <0>;
 192                                                 reg = <0>;
 193                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 194                                         };
 195
 196                                         prog1: prog@1 {
 197                                                 #clock-cells = <0>;
 198                                                 reg = <1>;
 199                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 200                                         };
 201                                 };
 202
 203                                 systemck {
 204                                         compatible = "atmel,at91rm9200-clk-system";
 205                                         #address-cells = <1>;
 206                                         #size-cells = <0>;
 207
 208                                         ddrck: ddrck@2 {
 209                                                 #clock-cells = <0>;
 210                                                 reg = <2>;
 211                                                 clocks = <&mck>;
 212                                         };
 213
 214                                         lcdck: lcdck@3 {
 215                                                 #clock-cells = <0>;
 216                                                 reg = <3>;
 217                                                 clocks = <&mck>;
 218                                         };
 219
 220                                         uhpck: uhpck@6 {
 221                                                 #clock-cells = <0>;
 222                                                 reg = <6>;
 223                                                 clocks = <&usb>;
 224                                         };
 225
 226                                         udpck: udpck@7 {
 227                                                 #clock-cells = <0>;
 228                                                 reg = <7>;
 229                                                 clocks = <&usb>;
 230                                         };
 231
 232                                         pck0: pck0@8 {
 233                                                 #clock-cells = <0>;
 234                                                 reg = <8>;
 235                                                 clocks = <&prog0>;
 236                                         };
 237
 238                                         pck1: pck1@9 {
 239                                                 #clock-cells = <0>;
 240                                                 reg = <9>;
 241                                                 clocks = <&prog1>;
 242                                         };
 243                                 };
 244
 245                                 periphck {
 246                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 247                                         #address-cells = <1>;
 248                                         #size-cells = <0>;
 249                                         clocks = <&mck>;
 250                                         u-boot,dm-pre-reloc;
 251
 252                                         pioAB_clk: pioAB_clk@2 {
 253                                                 #clock-cells = <0>;
 254                                                 reg = <2>;
 255                                                 u-boot,dm-pre-reloc;
 256                                         };
 257
 258                                         pioCD_clk: pioCD_clk@3 {
 259                                                 #clock-cells = <0>;
 260                                                 reg = <3>;
 261                                                 u-boot,dm-pre-reloc;
 262                                         };
 263
 264                                         fuse_clk: fuse_clk@4 {
 265                                                 #clock-cells = <0>;
 266                                                 reg = <4>;
 267                                         };
 268
 269                                         usart0_clk: usart0_clk@5 {
 270                                                 #clock-cells = <0>;
 271                                                 reg = <5>;
 272                                         };
 273
 274                                         usart1_clk: usart1_clk@6 {
 275                                                 #clock-cells = <0>;
 276                                                 reg = <6>;
 277                                         };
 278
 279                                         usart2_clk: usart2_clk@7 {
 280                                                 #clock-cells = <0>;
 281                                                 reg = <7>;
 282                                         };
 283
 284                                         usart3_clk: usart3_clk@8 {
 285                                                 #clock-cells = <0>;
 286                                                 reg = <8>;
 287                                         };
 288
 289                                         twi0_clk: twi0_clk@9 {
 290                                                 reg = <9>;
 291                                                 #clock-cells = <0>;
 292                                         };
 293
 294                                         twi1_clk: twi1_clk@10 {
 295                                                 #clock-cells = <0>;
 296                                                 reg = <10>;
 297                                         };
 298
 299                                         mci0_clk: mci0_clk@12 {
 300                                                 #clock-cells = <0>;
 301                                                 reg = <12>;
 302                                         };
 303
 304                                         spi0_clk: spi0_clk@13 {
 305                                                 #clock-cells = <0>;
 306                                                 reg = <13>;
 307                                         };
 308
 309                                         spi1_clk: spi1_clk@14 {
 310                                                 #clock-cells = <0>;
 311                                                 reg = <14>;
 312                                         };
 313
 314                                         uart0_clk: uart0_clk@15 {
 315                                                 #clock-cells = <0>;
 316                                                 reg = <15>;
 317                                         };
 318
 319                                         uart1_clk: uart1_clk@16 {
 320                                                 #clock-cells = <0>;
 321                                                 reg = <16>;
 322                                         };
 323
 324                                         tcb_clk: tcb_clk@17 {
 325                                                 #clock-cells = <0>;
 326                                                 reg = <17>;
 327                                         };
 328
 329                                         pwm_clk: pwm_clk@18 {
 330                                                 #clock-cells = <0>;
 331                                                 reg = <18>;
 332                                         };
 333
 334                                         adc_clk: adc_clk@19 {
 335                                                 #clock-cells = <0>;
 336                                                 reg = <19>;
 337                                         };
 338
 339                                         dma0_clk: dma0_clk@20 {
 340                                                 #clock-cells = <0>;
 341                                                 reg = <20>;
 342                                         };
 343
 344                                         uhphs_clk: uhphs_clk@22 {
 345                                                 #clock-cells = <0>;
 346                                                 reg = <22>;
 347                                         };
 348
 349                                         udphs_clk: udphs_clk@23 {
 350                                                 #clock-cells = <0>;
 351                                                 reg = <23>;
 352                                         };
 353
 354                                         lcdc_clk: lcdc_clk@25 {
 355                                                 #clock-cells = <0>;
 356                                                 reg = <25>;
 357                                         };
 358
 359                                         sha_clk: sha_clk@27 {
 360                                                 #clock-cells = <0>;
 361                                                 reg = <27>;
 362                                         };
 363
 364                                         ssc0_clk: ssc0_clk@28 {
 365                                                 #clock-cells = <0>;
 366                                                 reg = <28>;
 367                                         };
 368
 369                                         aes_clk: aes_clk@29 {
 370                                                 #clock-cells = <0>;
 371                                                 reg = <29>;
 372                                         };
 373
 374                                         trng_clk: trng_clk@30 {
 375                                                 #clock-cells = <0>;
 376                                                 reg = <30>;
 377                                         };
 378                                 };
 379                         };
 380
 381                         rstc@fffffe00 {
 382                                 compatible = "atmel,at91sam9g45-rstc";
 383                                 reg = <0xfffffe00 0x10>;
 384                                 clocks = <&clk32k>;
 385                         };
 386
 387                         pit: timer@fffffe30 {
 388                                 compatible = "atmel,at91sam9260-pit";
 389                                 reg = <0xfffffe30 0xf>;
 390                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 391                                 clocks = <&mck>;
 392                         };
 393
 394                         shdwc@fffffe10 {
 395                                 compatible = "atmel,at91sam9x5-shdwc";
 396                                 reg = <0xfffffe10 0x10>;
 397                                 clocks = <&clk32k>;
 398                         };
 399
 400                         sckc@fffffe50 {
 401                                 compatible = "atmel,at91sam9x5-sckc";
 402                                 reg = <0xfffffe50 0x4>;
 403
 404                                 slow_osc: slow_osc {
 405                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 406                                         #clock-cells = <0>;
 407                                         clocks = <&slow_xtal>;
 408                                 };
 409
 410                                 slow_rc_osc: slow_rc_osc {
 411                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 412                                         #clock-cells = <0>;
 413                                         clock-frequency = <32768>;
 414                                         clock-accuracy = <50000000>;
 415                                 };
 416
 417                                 clk32k: slck {
 418                                         compatible = "atmel,at91sam9x5-clk-slow";
 419                                         #clock-cells = <0>;
 420                                         clocks = <&slow_rc_osc>, <&slow_osc>;
 421                                 };
 422                         };
 423
 424                         mmc0: mmc@f0008000 {
 425                                 compatible = "atmel,hsmci";
 426                                 reg = <0xf0008000 0x600>;
 427                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 428                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(0)>;
 429                                 dma-names = "rxtx";
 430                                 clocks = <&mci0_clk>;
 431                                 clock-names = "mci_clk";
 432                                 #address-cells = <1>;
 433                                 #size-cells = <0>;
 434                                 status = "disabled";
 435                         };
 436
 437                         tcb0: timer@f8008000 {
 438                                 compatible = "atmel,at91sam9x5-tcb";
 439                                 reg = <0xf8008000 0x100>;
 440                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 441                                 clocks = <&tcb_clk>, <&clk32k>;
 442                                 clock-names = "t0_clk", "slow_clk";
 443                         };
 444
 445                         tcb1: timer@f800c000 {
 446                                 compatible = "atmel,at91sam9x5-tcb";
 447                                 reg = <0xf800c000 0x100>;
 448                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 449                                 clocks = <&tcb_clk>, <&clk32k>;
 450                                 clock-names = "t0_clk", "slow_clk";
 451                         };
 452
 453                         hlcdc: hlcdc@f8038000 {
 454                                 compatible = "atmel,at91sam9n12-hlcdc";
 455                                 reg = <0xf8038000 0x2000>;
 456                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 0>;
 457                                 clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
 458                                 clock-names = "periph_clk", "sys_clk", "slow_clk";
 459                                 status = "disabled";
 460
 461                                 hlcdc-display-controller {
 462                                         compatible = "atmel,hlcdc-display-controller";
 463                                         #address-cells = <1>;
 464                                         #size-cells = <0>;
 465
 466                                         port@0 {
 467                                                 #address-cells = <1>;
 468                                                 #size-cells = <0>;
 469                                                 reg = <0>;
 470                                         };
 471                                 };
 472
 473                                 hlcdc_pwm: hlcdc-pwm {
 474                                         compatible = "atmel,hlcdc-pwm";
 475                                         pinctrl-names = "default";
 476                                         pinctrl-0 = <&pinctrl_lcd_pwm>;
 477                                         #pwm-cells = <3>;
 478                                 };
 479                         };
 480
 481                         dma: dma-controller@ffffec00 {
 482                                 compatible = "atmel,at91sam9g45-dma";
 483                                 reg = <0xffffec00 0x200>;
 484                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 485                                 #dma-cells = <2>;
 486                                 clocks = <&dma0_clk>;
 487                                 clock-names = "dma_clk";
 488                         };
 489
 490                         pinctrl@fffff400 {
 491                                 #address-cells = <1>;
 492                                 #size-cells = <1>;
 493                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 494                                 ranges = <0xfffff400 0xfffff400 0x800>;
 495                                 reg = <0xfffff400 0x200
 496                                        0xfffff600 0x200
 497                                        0xfffff800 0x200
 498                                        0xfffffa00 0x200
 499                                       >;
 500
 501                                 atmel,mux-mask = <
 502                                       /*    A         B          C     */
 503                                        0xffffffff 0xffe07983 0x00000000  /* pioA */
 504                                        0x00040000 0x00047e0f 0x00000000  /* pioB */
 505                                        0xfdffffff 0x07c00000 0xb83fffff  /* pioC */
 506                                        0x003fffff 0x003f8000 0x00000000  /* pioD */
 507                                       >;
 508                                 u-boot,dm-pre-reloc;
 509
 510                                 /* shared pinctrl settings */
 511                                 dbgu {
 512                                         u-boot,dm-pre-reloc;
 513                                         pinctrl_dbgu: dbgu-0 {
 514                                                 atmel,pins =
 515                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
 516                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 517                                         };
 518                                 };
 519
 520                                 lcd {
 521                                         pinctrl_lcd_base: lcd-base-0 {
 522                                                 atmel,pins =
 523                                                         <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDVSYNC */
 524                                                          AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDHSYNC */
 525                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDISP */
 526                                                          AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDDEN */
 527                                                          AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
 528                                         };
 529
 530                                         pinctrl_lcd_pwm: lcd-pwm-0 {
 531                                                 atmel,pins = <AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;    /* LCDPWM */
 532                                         };
 533
 534                                         pinctrl_lcd_rgb888: lcd-rgb-3 {
 535                                                 atmel,pins =
 536                                                         <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD0 pin */
 537                                                          AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD1 pin */
 538                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD2 pin */
 539                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD3 pin */
 540                                                          AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD4 pin */
 541                                                          AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD5 pin */
 542                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD6 pin */
 543                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD7 pin */
 544                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD8 pin */
 545                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* LCDD9 pin */
 546                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD10 pin */
 547                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD11 pin */
 548                                                          AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD12 pin */
 549                                                          AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD13 pin */
 550                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD14 pin */
 551                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD15 pin */
 552                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD16 pin */
 553                                                          AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD17 pin */
 554                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD18 pin */
 555                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD19 pin */
 556                                                          AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD20 pin */
 557                                                          AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD21 pin */
 558                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* LCDD22 pin */
 559                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
 560                                         };
 561                                 };
 562
 563                                 usart0 {
 564                                         pinctrl_usart0: usart0-0 {
 565                                                 atmel,pins =
 566                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
 567                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA0 periph A */
 568                                         };
 569
 570                                         pinctrl_usart0_rts: usart0_rts-0 {
 571                                                 atmel,pins =
 572                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 573                                         };
 574
 575                                         pinctrl_usart0_cts: usart0_cts-0 {
 576                                                 atmel,pins =
 577                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 578                                         };
 579                                 };
 580
 581                                 usart1 {
 582                                         pinctrl_usart1: usart1-0 {
 583                                                 atmel,pins =
 584                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
 585                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
 586                                         };
 587                                 };
 588
 589                                 usart2 {
 590                                         pinctrl_usart2: usart2-0 {
 591                                                 atmel,pins =
 592                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
 593                                                          AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA7 periph A */
 594                                         };
 595
 596                                         pinctrl_usart2_rts: usart2_rts-0 {
 597                                                 atmel,pins =
 598                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 599                                         };
 600
 601                                         pinctrl_usart2_cts: usart2_cts-0 {
 602                                                 atmel,pins =
 603                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 604                                         };
 605                                 };
 606
 607                                 usart3 {
 608                                         pinctrl_usart3: usart3-0 {
 609                                                 atmel,pins =
 610                                                         <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PC23 periph B with pullup */
 611                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
 612                                         };
 613
 614                                         pinctrl_usart3_rts: usart3_rts-0 {
 615                                                 atmel,pins =
 616                                                         <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
 617                                         };
 618
 619                                         pinctrl_usart3_cts: usart3_cts-0 {
 620                                                 atmel,pins =
 621                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
 622                                         };
 623                                 };
 624
 625                                 uart0 {
 626                                         pinctrl_uart0: uart0-0 {
 627                                                 atmel,pins =
 628                                                         <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
 629                                                          AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC8 periph C */
 630                                         };
 631                                 };
 632
 633                                 uart1 {
 634                                         pinctrl_uart1: uart1-0 {
 635                                                 atmel,pins =
 636                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP        /* PC17 periph C with pullup */
 637                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
 638                                         };
 639                                 };
 640
 641                                 nand {
 642                                         pinctrl_nand: nand-0 {
 643                                                 atmel,pins =
 644                                                         <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY pin pull_up*/
 645                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;    /* PD4 gpio enable pin pull_up */
 646                                         };
 647                                 };
 648
 649                                 mmc0 {
 650                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 651                                                 atmel,pins =
 652                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 653                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 654                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 655                                         };
 656
 657                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 658                                                 atmel,pins =
 659                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 660                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 661                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 662                                         };
 663
 664                                         pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
 665                                                 atmel,pins =
 666                                                         <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA11 periph B with pullup */
 667                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 668                                                          AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA13 periph B with pullup */
 669                                                          AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA14 periph B with pullup */
 670                                         };
 671                                 };
 672
 673                                 ssc0 {
 674                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 675                                                 atmel,pins =
 676                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 677                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 678                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 679                                         };
 680
 681                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 682                                                 atmel,pins =
 683                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 684                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 685                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 686                                         };
 687                                 };
 688
 689                                 spi0 {
 690                                         pinctrl_spi0: spi0-0 {
 691                                                 atmel,pins =
 692                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 693                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 694                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 695                                         };
 696                                 };
 697
 698                                 spi1 {
 699                                         pinctrl_spi1: spi1-0 {
 700                                                 atmel,pins =
 701                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 702                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 703                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 704                                         };
 705                                 };
 706
 707                                 i2c0 {
 708                                         pinctrl_i2c0: i2c0-0 {
 709                                                 atmel,pins =
 710                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
 711                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 712                                         };
 713                                 };
 714
 715                                 i2c1 {
 716                                         pinctrl_i2c1: i2c1-0 {
 717                                                 atmel,pins =
 718                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE
 719                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 720                                         };
 721                                 };
 722
 723                                 tcb0 {
 724                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 725                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 726                                         };
 727
 728                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 729                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 730                                         };
 731
 732                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 733                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 734                                         };
 735
 736                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 737                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 738                                         };
 739
 740                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 741                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 742                                         };
 743
 744                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 745                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 746                                         };
 747
 748                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 749                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 750                                         };
 751
 752                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 753                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 754                                         };
 755
 756                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 757                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 758                                         };
 759                                 };
 760
 761                                 tcb1 {
 762                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 763                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 764                                         };
 765
 766                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 767                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 768                                         };
 769
 770                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 771                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 772                                         };
 773
 774                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 775                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 776                                         };
 777
 778                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 779                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 780                                         };
 781
 782                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 783                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 784                                         };
 785
 786                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 787                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 788                                         };
 789
 790                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 791                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 792                                         };
 793
 794                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 795                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 796                                         };
 797                                 };
 798                         };
 799
 800                         pioA: gpio@fffff400 {
 801                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 802                                 reg = <0xfffff400 0x200>;
 803                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 804                                 #gpio-cells = <2>;
 805                                 gpio-controller;
 806                                 interrupt-controller;
 807                                 #interrupt-cells = <2>;
 808                                 clocks = <&pioAB_clk>;
 809                                 u-boot,dm-pre-reloc;
 810                         };
 811
 812                         pioB: gpio@fffff600 {
 813                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 814                                 reg = <0xfffff600 0x200>;
 815                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 816                                 #gpio-cells = <2>;
 817                                 gpio-controller;
 818                                 interrupt-controller;
 819                                 #interrupt-cells = <2>;
 820                                 clocks = <&pioAB_clk>;
 821                                 u-boot,dm-pre-reloc;
 822                         };
 823
 824                         pioC: gpio@fffff800 {
 825                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 826                                 reg = <0xfffff800 0x200>;
 827                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 828                                 #gpio-cells = <2>;
 829                                 gpio-controller;
 830                                 interrupt-controller;
 831                                 #interrupt-cells = <2>;
 832                                 clocks = <&pioCD_clk>;
 833                                 u-boot,dm-pre-reloc;
 834                         };
 835
 836                         pioD: gpio@fffffa00 {
 837                                 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 838                                 reg = <0xfffffa00 0x200>;
 839                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 840                                 #gpio-cells = <2>;
 841                                 gpio-controller;
 842                                 interrupt-controller;
 843                                 #interrupt-cells = <2>;
 844                                 clocks = <&pioCD_clk>;
 845                                 u-boot,dm-pre-reloc;
 846                         };
 847
 848                         dbgu: serial@fffff200 {
 849                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 850                                 reg = <0xfffff200 0x200>;
 851                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 852                                 pinctrl-names = "default";
 853                                 pinctrl-0 = <&pinctrl_dbgu>;
 854                                 clocks = <&mck>;
 855                                 clock-names = "usart";
 856                                 status = "disabled";
 857                         };
 858
 859                         ssc0: ssc@f0010000 {
 860                                 compatible = "atmel,at91sam9g45-ssc";
 861                                 reg = <0xf0010000 0x4000>;
 862                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 863                                 dmas = <&dma 0 AT91_DMA_CFG_PER_ID(21)>,
 864                                        <&dma 0 AT91_DMA_CFG_PER_ID(22)>;
 865                                 dma-names = "tx", "rx";
 866                                 pinctrl-names = "default";
 867                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 868                                 clocks = <&ssc0_clk>;
 869                                 clock-names = "pclk";
 870                                 status = "disabled";
 871                         };
 872
 873                         usart0: serial@f801c000 {
 874                                 compatible = "atmel,at91sam9260-usart";
 875                                 reg = <0xf801c000 0x4000>;
 876                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 877                                 pinctrl-names = "default";
 878                                 pinctrl-0 = <&pinctrl_usart0>;
 879                                 clocks = <&usart0_clk>;
 880                                 clock-names = "usart";
 881                                 status = "disabled";
 882                         };
 883
 884                         usart1: serial@f8020000 {
 885                                 compatible = "atmel,at91sam9260-usart";
 886                                 reg = <0xf8020000 0x4000>;
 887                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 888                                 pinctrl-names = "default";
 889                                 pinctrl-0 = <&pinctrl_usart1>;
 890                                 clocks = <&usart1_clk>;
 891                                 clock-names = "usart";
 892                                 status = "disabled";
 893                         };
 894
 895                         usart2: serial@f8024000 {
 896                                 compatible = "atmel,at91sam9260-usart";
 897                                 reg = <0xf8024000 0x4000>;
 898                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 899                                 pinctrl-names = "default";
 900                                 pinctrl-0 = <&pinctrl_usart2>;
 901                                 clocks = <&usart2_clk>;
 902                                 clock-names = "usart";
 903                                 status = "disabled";
 904                         };
 905
 906                         usart3: serial@f8028000 {
 907                                 compatible = "atmel,at91sam9260-usart";
 908                                 reg = <0xf8028000 0x4000>;
 909                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 910                                 pinctrl-names = "default";
 911                                 pinctrl-0 = <&pinctrl_usart3>;
 912                                 clocks = <&usart3_clk>;
 913                                 clock-names = "usart";
 914                                 status = "disabled";
 915                         };
 916
 917                         i2c0: i2c@f8010000 {
 918                                 compatible = "atmel,at91sam9x5-i2c";
 919                                 reg = <0xf8010000 0x100>;
 920                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 921                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(13)>,
 922                                        <&dma 1 AT91_DMA_CFG_PER_ID(14)>;
 923                                 dma-names = "tx", "rx";
 924                                 #address-cells = <1>;
 925                                 #size-cells = <0>;
 926                                 pinctrl-names = "default";
 927                                 pinctrl-0 = <&pinctrl_i2c0>;
 928                                 clocks = <&twi0_clk>;
 929                                 status = "disabled";
 930                         };
 931
 932                         i2c1: i2c@f8014000 {
 933                                 compatible = "atmel,at91sam9x5-i2c";
 934                                 reg = <0xf8014000 0x100>;
 935                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 936                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(15)>,
 937                                        <&dma 1 AT91_DMA_CFG_PER_ID(16)>;
 938                                 dma-names = "tx", "rx";
 939                                 #address-cells = <1>;
 940                                 #size-cells = <0>;
 941                                 pinctrl-names = "default";
 942                                 pinctrl-0 = <&pinctrl_i2c1>;
 943                                 clocks = <&twi1_clk>;
 944                                 status = "disabled";
 945                         };
 946
 947                         spi0: spi@f0000000 {
 948                                 #address-cells = <1>;
 949                                 #size-cells = <0>;
 950                                 compatible = "atmel,at91rm9200-spi";
 951                                 reg = <0xf0000000 0x100>;
 952                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 953                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(1)>,
 954                                        <&dma 1 AT91_DMA_CFG_PER_ID(2)>;
 955                                 dma-names = "tx", "rx";
 956                                 pinctrl-names = "default";
 957                                 pinctrl-0 = <&pinctrl_spi0>;
 958                                 clocks = <&spi0_clk>;
 959                                 clock-names = "spi_clk";
 960                                 status = "disabled";
 961                         };
 962
 963                         spi1: spi@f0004000 {
 964                                 #address-cells = <1>;
 965                                 #size-cells = <0>;
 966                                 compatible = "atmel,at91rm9200-spi";
 967                                 reg = <0xf0004000 0x100>;
 968                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
 969                                 dmas = <&dma 1 AT91_DMA_CFG_PER_ID(3)>,
 970                                        <&dma 1 AT91_DMA_CFG_PER_ID(4)>;
 971                                 dma-names = "tx", "rx";
 972                                 pinctrl-names = "default";
 973                                 pinctrl-0 = <&pinctrl_spi1>;
 974                                 clocks = <&spi1_clk>;
 975                                 clock-names = "spi_clk";
 976                                 status = "disabled";
 977                         };
 978
 979                         watchdog@fffffe40 {
 980                                 compatible = "atmel,at91sam9260-wdt";
 981                                 reg = <0xfffffe40 0x10>;
 982                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 983                                 clocks = <&clk32k>;
 984                                 atmel,watchdog-type = "hardware";
 985                                 atmel,reset-type = "all";
 986                                 atmel,dbg-halt;
 987                                 status = "disabled";
 988                         };
 989
 990                         rtc@fffffeb0 {
 991                                 compatible = "atmel,at91rm9200-rtc";
 992                                 reg = <0xfffffeb0 0x40>;
 993                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 994                                 clocks = <&clk32k>;
 995                                 status = "disabled";
 996                         };
 997
 998                         pwm0: pwm@f8034000 {
 999                                 compatible = "atmel,at91sam9rl-pwm";
1000                                 reg = <0xf8034000 0x300>;
1001                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 4>;
1002                                 #pwm-cells = <3>;
1003                                 clocks = <&pwm_clk>;
1004                                 status = "disabled";
1005                         };
1006
1007                         usb1: gadget@f803c000 {
1008                                 compatible = "atmel,at91sam9260-udc";
1009                                 reg = <0xf803c000 0x4000>;
1010                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
1011                                 clocks = <&udphs_clk>, <&udpck>;
1012                                 clock-names = "pclk", "hclk";
1013                                 status = "disabled";
1014                         };
1015                 };
1016
1017                 nand0: nand@40000000 {
1018                         compatible = "atmel,at91rm9200-nand";
1019                         #address-cells = <1>;
1020                         #size-cells = <1>;
1021                         reg = < 0x40000000 0x10000000
1022                                 0xffffe000 0x00000600
1023                                 0xffffe600 0x00000200
1024                                 0x00108000 0x00018000
1025                                >;
1026                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
1027                         atmel,nand-addr-offset = <21>;
1028                         atmel,nand-cmd-offset = <22>;
1029                         atmel,nand-has-dma;
1030                         pinctrl-names = "default";
1031                         pinctrl-0 = <&pinctrl_nand>;
1032                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
1033                                  &pioD 4 GPIO_ACTIVE_HIGH
1034                                  0
1035                                 >;
1036                         status = "disabled";
1037                 };
1038
1039                 usb0: ohci@00500000 {
1040                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1041                         reg = <0x00500000 0x00100000>;
1042                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1043                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1044                         clock-names = "ohci_clk", "hclk", "uhpck";
1045                         status = "disabled";
1046                 };
1047         };
1048
1049         i2c-gpio-0 {
1050                 compatible = "i2c-gpio";
1051                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
1052                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
1053                         >;
1054                 i2c-gpio,sda-open-drain;
1055                 i2c-gpio,scl-open-drain;
1056                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1057                 #address-cells = <1>;
1058                 #size-cells = <0>;
1059                 status = "disabled";
1060         };
1061 };