Merge branch 'master' of git://git.denx.de/u-boot-sh
[oweals/u-boot.git] / arch / arm / dts / at91sam9263.dtsi
1 /*
2  * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
3  *
4  *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5  *
6  * Licensed under GPLv2 only.
7  */
8
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
14
15 / {
16         model = "Atmel AT91SAM9263 family SoC";
17         compatible = "atmel,at91sam9263";
18         interrupt-parent = <&aic>;
19
20         aliases {
21                 serial0 = &dbgu;
22                 serial1 = &usart0;
23                 serial2 = &usart1;
24                 serial3 = &usart2;
25                 gpio0 = &pioA;
26                 gpio1 = &pioB;
27                 gpio2 = &pioC;
28                 gpio3 = &pioD;
29                 gpio4 = &pioE;
30                 tcb0 = &tcb0;
31                 i2c0 = &i2c0;
32                 ssc0 = &ssc0;
33                 ssc1 = &ssc1;
34                 pwm0 = &pwm0;
35                 spi0 = &spi0;
36         };
37
38         cpus {
39                 cpu {
40                         compatible = "arm,arm926ej-s";
41                         device_type = "cpu";
42                 };
43         };
44
45         memory {
46                 reg = <0x20000000 0x08000000>;
47         };
48
49         clocks {
50                 main_xtal: main_xtal {
51                         compatible = "fixed-clock";
52                         #clock-cells = <0>;
53                         clock-frequency = <0>;
54                 };
55
56                 slow_xtal: slow_xtal {
57                         compatible = "fixed-clock";
58                         #clock-cells = <0>;
59                         clock-frequency = <0>;
60                 };
61         };
62
63         sram0: sram@00300000 {
64                 compatible = "mmio-sram";
65                 reg = <0x00300000 0x14000>;
66         };
67
68         sram1: sram@00500000 {
69                 compatible = "mmio-sram";
70                 reg = <0x00500000 0x4000>;
71         };
72
73         ahb {
74                 compatible = "simple-bus";
75                 #address-cells = <1>;
76                 #size-cells = <1>;
77                 ranges;
78                 u-boot,dm-pre-reloc;
79
80                 apb {
81                         compatible = "simple-bus";
82                         #address-cells = <1>;
83                         #size-cells = <1>;
84                         ranges;
85                         u-boot,dm-pre-reloc;
86
87                         aic: interrupt-controller@fffff000 {
88                                 #interrupt-cells = <3>;
89                                 compatible = "atmel,at91rm9200-aic";
90                                 interrupt-controller;
91                                 reg = <0xfffff000 0x200>;
92                                 atmel,external-irqs = <30 31>;
93                         };
94
95                         pmc: pmc@fffffc00 {
96                                 compatible = "atmel,at91rm9200-pmc", "syscon";
97                                 reg = <0xfffffc00 0x100>;
98                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
99                                 interrupt-controller;
100                                 #address-cells = <1>;
101                                 #size-cells = <0>;
102                                 #interrupt-cells = <1>;
103                                 u-boot,dm-pre-reloc;
104
105                                 main_osc: main_osc {
106                                         compatible = "atmel,at91rm9200-clk-main-osc";
107                                         #clock-cells = <0>;
108                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
109                                         clocks = <&main_xtal>;
110                                 };
111
112                                 main: mainck {
113                                         compatible = "atmel,at91rm9200-clk-main";
114                                         #clock-cells = <0>;
115                                         clocks = <&main_osc>;
116                                 };
117
118                                 plla: pllack@0 {
119                                         compatible = "atmel,at91rm9200-clk-pll";
120                                         #clock-cells = <0>;
121                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
122                                         clocks = <&main>;
123                                         reg = <0>;
124                                         atmel,clk-input-range = <1000000 32000000>;
125                                         #atmel,pll-clk-output-range-cells = <4>;
126                                         atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
127                                                                 <190000000 240000000 2 1>;
128                                 };
129
130                                 pllb: pllbck@1 {
131                                         compatible = "atmel,at91rm9200-clk-pll";
132                                         #clock-cells = <0>;
133                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
134                                         clocks = <&main>;
135                                         reg = <1>;
136                                         atmel,clk-input-range = <1000000 32000000>;
137                                         #atmel,pll-clk-output-range-cells = <4>;
138                                         atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
139                                                                 <190000000 240000000 2 1>;
140                                 };
141
142                                 mck: masterck {
143                                         compatible = "atmel,at91rm9200-clk-master";
144                                         #clock-cells = <0>;
145                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
146                                         clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
147                                         atmel,clk-output-range = <0 120000000>;
148                                         atmel,clk-divisors = <1 2 4 0>;
149                                         u-boot,dm-pre-reloc;
150                                 };
151
152                                 usb: usbck {
153                                         compatible = "atmel,at91rm9200-clk-usb";
154                                         #clock-cells = <0>;
155                                         atmel,clk-divisors = <1 2 4 0>;
156                                         clocks = <&pllb>;
157                                 };
158
159                                 prog: progck {
160                                         compatible = "atmel,at91rm9200-clk-programmable";
161                                         #address-cells = <1>;
162                                         #size-cells = <0>;
163                                         interrupt-parent = <&pmc>;
164                                         clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
165
166                                         prog0: prog@0 {
167                                                 #clock-cells = <0>;
168                                                 reg = <0>;
169                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
170                                         };
171
172                                         prog1: prog@1 {
173                                                 #clock-cells = <0>;
174                                                 reg = <1>;
175                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
176                                         };
177
178                                         prog2: prog@2 {
179                                                 #clock-cells = <0>;
180                                                 reg = <2>;
181                                                 interrupts = <AT91_PMC_PCKRDY(2)>;
182                                         };
183
184                                         prog3: prog@3 {
185                                                 #clock-cells = <0>;
186                                                 reg = <3>;
187                                                 interrupts = <AT91_PMC_PCKRDY(3)>;
188                                         };
189                                 };
190
191                                 systemck {
192                                         compatible = "atmel,at91rm9200-clk-system";
193                                         #address-cells = <1>;
194                                         #size-cells = <0>;
195
196                                         uhpck: uhpck@6 {
197                                                 #clock-cells = <0>;
198                                                 reg = <6>;
199                                                 clocks = <&usb>;
200                                         };
201
202                                         udpck: udpck@7 {
203                                                 #clock-cells = <0>;
204                                                 reg = <7>;
205                                                 clocks = <&usb>;
206                                         };
207
208                                         pck0: pck0@8 {
209                                                 #clock-cells = <0>;
210                                                 reg = <8>;
211                                                 clocks = <&prog0>;
212                                         };
213
214                                         pck1: pck1@9 {
215                                                 #clock-cells = <0>;
216                                                 reg = <9>;
217                                                 clocks = <&prog1>;
218                                         };
219
220                                         pck2: pck2@10 {
221                                                 #clock-cells = <0>;
222                                                 reg = <10>;
223                                                 clocks = <&prog2>;
224                                         };
225
226                                         pck3: pck3@11 {
227                                                 #clock-cells = <0>;
228                                                 reg = <11>;
229                                                 clocks = <&prog3>;
230                                         };
231                                 };
232
233                                 periphck {
234                                         compatible = "atmel,at91rm9200-clk-peripheral";
235                                         #address-cells = <1>;
236                                         #size-cells = <0>;
237                                         clocks = <&mck>;
238                                         u-boot,dm-pre-reloc;
239
240                                         pioA_clk: pioA_clk@2 {
241                                                 #clock-cells = <0>;
242                                                 reg = <2>;
243                                                 u-boot,dm-pre-reloc;
244                                         };
245
246                                         pioB_clk: pioB_clk@3 {
247                                                 #clock-cells = <0>;
248                                                 reg = <3>;
249                                                 u-boot,dm-pre-reloc;
250                                         };
251
252                                         pioCDE_clk: pioCDE_clk@4 {
253                                                 #clock-cells = <0>;
254                                                 reg = <4>;
255                                                 u-boot,dm-pre-reloc;
256                                         };
257
258                                         usart0_clk: usart0_clk@7 {
259                                                 #clock-cells = <0>;
260                                                 reg = <7>;
261                                         };
262
263                                         usart1_clk: usart1_clk@8 {
264                                                 #clock-cells = <0>;
265                                                 reg = <8>;
266                                         };
267
268                                         usart2_clk: usart2_clk@9 {
269                                                 #clock-cells = <0>;
270                                                 reg = <9>;
271                                         };
272
273                                         mci0_clk: mci0_clk@10 {
274                                                 #clock-cells = <0>;
275                                                 reg = <10>;
276                                         };
277
278                                         mci1_clk: mci1_clk@11 {
279                                                 #clock-cells = <0>;
280                                                 reg = <11>;
281                                         };
282
283                                         can_clk: can_clk@12 {
284                                                 #clock-cells = <0>;
285                                                 reg = <12>;
286                                         };
287
288                                         twi0_clk: twi0_clk@13 {
289                                                 #clock-cells = <0>;
290                                                 reg = <13>;
291                                         };
292
293                                         spi0_clk: spi0_clk@14 {
294                                                 #clock-cells = <0>;
295                                                 reg = <14>;
296                                         };
297
298                                         spi1_clk: spi1_clk@15 {
299                                                 #clock-cells = <0>;
300                                                 reg = <15>;
301                                         };
302
303                                         ssc0_clk: ssc0_clk@16 {
304                                                 #clock-cells = <0>;
305                                                 reg = <16>;
306                                         };
307
308                                         ssc1_clk: ssc1_clk@17 {
309                                                 #clock-cells = <0>;
310                                                 reg = <17>;
311                                         };
312
313                                         ac97_clk: ac97_clk@18 {
314                                                 #clock-cells = <0>;
315                                                 reg = <18>;
316                                         };
317
318                                         tcb_clk: tcb_clk@19 {
319                                                 #clock-cells = <0>;
320                                                 reg = <19>;
321                                         };
322
323                                         pwm_clk: pwm_clk@20 {
324                                                 #clock-cells = <0>;
325                                                 reg = <20>;
326                                         };
327
328                                         macb0_clk: macb0_clk@21 {
329                                                 #clock-cells = <0>;
330                                                 reg = <21>;
331                                         };
332
333                                         g2de_clk: g2de_clk@23 {
334                                                 #clock-cells = <0>;
335                                                 reg = <23>;
336                                         };
337
338                                         udc_clk: udc_clk@24 {
339                                                 #clock-cells = <0>;
340                                                 reg = <24>;
341                                         };
342
343                                         isi_clk: isi_clk@25 {
344                                                 #clock-cells = <0>;
345                                                 reg = <25>;
346                                         };
347
348                                         lcd_clk: lcd_clk@26 {
349                                                 #clock-cells = <0>;
350                                                 reg = <26>;
351                                         };
352
353                                         dma_clk: dma_clk@27 {
354                                                 #clock-cells = <0>;
355                                                 reg = <27>;
356                                         };
357
358                                         ohci_clk: ohci_clk@29 {
359                                                 #clock-cells = <0>;
360                                                 reg = <29>;
361                                         };
362                                 };
363                         };
364
365                         ramc0: ramc@ffffe200 {
366                                 compatible = "atmel,at91sam9260-sdramc";
367                                 reg = <0xffffe200 0x200>;
368                         };
369
370                         ramc1: ramc@ffffe800 {
371                                 compatible = "atmel,at91sam9260-sdramc";
372                                 reg = <0xffffe800 0x200>;
373                         };
374
375                         pit: timer@fffffd30 {
376                                 compatible = "atmel,at91sam9260-pit";
377                                 reg = <0xfffffd30 0xf>;
378                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
379                                 clocks = <&mck>;
380                         };
381
382                         tcb0: timer@fff7c000 {
383                                 compatible = "atmel,at91rm9200-tcb";
384                                 reg = <0xfff7c000 0x100>;
385                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
386                                 clocks = <&tcb_clk>, <&slow_xtal>;
387                                 clock-names = "t0_clk", "slow_clk";
388                         };
389
390                         rstc@fffffd00 {
391                                 compatible = "atmel,at91sam9260-rstc";
392                                 reg = <0xfffffd00 0x10>;
393                                 clocks = <&slow_xtal>;
394                         };
395
396                         shdwc@fffffd10 {
397                                 compatible = "atmel,at91sam9260-shdwc";
398                                 reg = <0xfffffd10 0x10>;
399                                 clocks = <&slow_xtal>;
400                         };
401
402                         pinctrl@fffff200 {
403                                 #address-cells = <1>;
404                                 #size-cells = <1>;
405                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
406                                 ranges = <0xfffff200 0xfffff200 0xa00>;
407                                 reg = <0xfffff200 0x200
408                                        0xfffff400 0x200
409                                        0xfffff600 0x200
410                                        0xfffff800 0x200
411                                        0xfffffa00 0x200
412                                       >;
413
414                                 atmel,mux-mask = <
415                                       /*    A         B     */
416                                        0xfffffffb 0xffffe07f  /* pioA */
417                                        0x0007ffff 0x39072fff  /* pioB */
418                                        0xffffffff 0x3ffffff8  /* pioC */
419                                        0xfffffbff 0xffffffff  /* pioD */
420                                        0xffe00fff 0xfbfcff00  /* pioE */
421                                       >;
422
423                                 /* shared pinctrl settings */
424                                 dbgu {
425                                         pinctrl_dbgu: dbgu-0 {
426                                                 atmel,pins =
427                                                         <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
428                                                          AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
429                                         };
430                                 };
431
432                                 usart0 {
433                                         pinctrl_usart0: usart0-0 {
434                                                 atmel,pins =
435                                                         <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA26 periph A with pullup */
436                                                          AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
437                                         };
438
439                                         pinctrl_usart0_rts: usart0_rts-0 {
440                                                 atmel,pins =
441                                                         <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
442                                         };
443
444                                         pinctrl_usart0_cts: usart0_cts-0 {
445                                                 atmel,pins =
446                                                         <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
447                                         };
448                                 };
449
450                                 usart1 {
451                                         pinctrl_usart1: usart1-0 {
452                                                 atmel,pins =
453                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
454                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD1 periph A */
455                                         };
456
457                                         pinctrl_usart1_rts: usart1_rts-0 {
458                                                 atmel,pins =
459                                                         <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD7 periph B */
460                                         };
461
462                                         pinctrl_usart1_cts: usart1_cts-0 {
463                                                 atmel,pins =
464                                                         <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD8 periph B */
465                                         };
466                                 };
467
468                                 usart2 {
469                                         pinctrl_usart2: usart2-0 {
470                                                 atmel,pins =
471                                                         <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
472                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PD3 periph A */
473                                         };
474
475                                         pinctrl_usart2_rts: usart2_rts-0 {
476                                                 atmel,pins =
477                                                         <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD5 periph B */
478                                         };
479
480                                         pinctrl_usart2_cts: usart2_cts-0 {
481                                                 atmel,pins =
482                                                         <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PD6 periph B */
483                                         };
484                                 };
485
486                                 nand {
487                                         pinctrl_nand: nand-0 {
488                                                 atmel,pins =
489                                                         <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP     /* PA22 gpio RDY pin pull_up*/
490                                                          AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PD15 gpio enable pin pull_up */
491                                         };
492                                 };
493
494                                 macb {
495                                         pinctrl_macb_rmii: macb_rmii-0 {
496                                                 atmel,pins =
497                                                         <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC25 periph B */
498                                                          AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE21 periph A */
499                                                          AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE23 periph A */
500                                                          AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE24 periph A */
501                                                          AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE25 periph A */
502                                                          AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE26 periph A */
503                                                          AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE27 periph A */
504                                                          AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE28 periph A */
505                                                          AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PE29 periph A */
506                                                          AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
507                                         };
508
509                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
510                                                 atmel,pins =
511                                                         <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC20 periph B */
512                                                          AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC21 periph B */
513                                                          AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC22 periph B */
514                                                          AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC23 periph B */
515                                                          AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC24 periph B */
516                                                          AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC25 periph B */
517                                                          AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC27 periph B */
518                                                          AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
519                                         };
520                                 };
521
522                                 mmc0 {
523                                         pinctrl_mmc0_clk: mmc0_clk-0 {
524                                                 atmel,pins =
525                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
526                                         };
527
528                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
529                                                 atmel,pins =
530                                                         <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
531                                                          AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA0 periph A with pullup */
532                                         };
533
534                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
535                                                 atmel,pins =
536                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
537                                                          AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
538                                                          AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA5 periph A with pullup */
539                                         };
540
541                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
542                                                 atmel,pins =
543                                                         <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
544                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA17 periph A with pullup */
545                                         };
546
547                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
548                                                 atmel,pins =
549                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
550                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
551                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
552                                         };
553                                 };
554
555                                 mmc1 {
556                                         pinctrl_mmc1_clk: mmc1_clk-0 {
557                                                 atmel,pins =
558                                                         <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
559                                         };
560
561                                         pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
562                                                 atmel,pins =
563                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
564                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA8 periph A with pullup */
565                                         };
566
567                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
568                                                 atmel,pins =
569                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
570                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA10 periph A with pullup */
571                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA11 periph A with pullup */
572                                         };
573
574                                         pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
575                                                 atmel,pins =
576                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA21 periph A with pullup */
577                                                          AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA22 periph A with pullup */
578                                         };
579
580                                         pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
581                                                 atmel,pins =
582                                                         <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA23 periph A with pullup */
583                                                          AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA24 periph A with pullup */
584                                                          AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA25 periph A with pullup */
585                                         };
586                                 };
587
588                                 ssc0 {
589                                         pinctrl_ssc0_tx: ssc0_tx-0 {
590                                                 atmel,pins =
591                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB0 periph B */
592                                                          AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB1 periph B */
593                                                          AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
594                                         };
595
596                                         pinctrl_ssc0_rx: ssc0_rx-0 {
597                                                 atmel,pins =
598                                                         <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB3 periph B */
599                                                          AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B */
600                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B */
601                                         };
602                                 };
603
604                                 ssc1 {
605                                         pinctrl_ssc1_tx: ssc1_tx-0 {
606                                                 atmel,pins =
607                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A */
608                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB7 periph A */
609                                                          AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
610                                         };
611
612                                         pinctrl_ssc1_rx: ssc1_rx-0 {
613                                                 atmel,pins =
614                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A */
615                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A */
616                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
617                                         };
618                                 };
619
620                                 spi0 {
621                                         pinctrl_spi0: spi0-0 {
622                                                 atmel,pins =
623                                                         <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA0 periph B SPI0_MISO pin */
624                                                          AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PA1 periph B SPI0_MOSI pin */
625                                                          AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PA2 periph B SPI0_SPCK pin */
626                                         };
627                                 };
628
629                                 spi1 {
630                                         pinctrl_spi1: spi1-0 {
631                                                 atmel,pins =
632                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A SPI1_MISO pin */
633                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A SPI1_MOSI pin */
634                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
635                                         };
636                                 };
637
638                                 tcb0 {
639                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
640                                                 atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
641                                         };
642
643                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
644                                                 atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
645                                         };
646
647                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
648                                                 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
649                                         };
650
651                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
652                                                 atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
653                                         };
654
655                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
656                                                 atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
657                                         };
658
659                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
660                                                 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
661                                         };
662
663                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
664                                                 atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
665                                         };
666
667                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
668                                                 atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
669                                         };
670
671                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
672                                                 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
673                                         };
674                                 };
675
676                                 fb {
677                                         pinctrl_fb: fb-0 {
678                                                 atmel,pins =
679                                                         <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC1 periph A */
680                                                          AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC2 periph A */
681                                                          AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC3 periph A */
682                                                          AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB9 periph B */
683                                                          AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC6 periph A */
684                                                          AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC7 periph A */
685                                                          AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC8 periph A */
686                                                          AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PC9 periph A */
687                                                          AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC10 periph A */
688                                                          AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC11 periph A */
689                                                          AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC14 periph A */
690                                                          AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC15 periph A */
691                                                          AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC16 periph A */
692                                                          AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC12 periph B */
693                                                          AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC18 periph A */
694                                                          AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC19 periph A */
695                                                          AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC22 periph A */
696                                                          AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC23 periph A */
697                                                          AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC24 periph A */
698                                                          AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PC17 periph B */
699                                                          AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PC26 periph A */
700                                                          AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
701                                         };
702                                 };
703
704                                 can {
705                                         pinctrl_can_rx_tx: can_rx_tx {
706                                                 atmel,pins =
707                                                         <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* CANRX, conflicts with IRQ0 */
708                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* CANTX, conflicts with PCK0 */
709                                         };
710                                 };
711
712                                 ac97 {
713                                         pinctrl_ac97: ac97-0 {
714                                                 atmel,pins =
715                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB12 periph A AC97FS pin */
716                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB13 periph A AC97CK pin */
717                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB14 periph A AC97TX pin */
718                                                          AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB14 periph A AC97RX pin */
719                                         };
720                                 };
721
722                         };
723
724                         pioA: gpio@fffff200 {
725                                 compatible = "atmel,at91rm9200-gpio";
726                                 reg = <0xfffff200 0x200>;
727                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
728                                 #gpio-cells = <2>;
729                                 gpio-controller;
730                                 interrupt-controller;
731                                 #interrupt-cells = <2>;
732                                 clocks = <&pioA_clk>;
733                                 u-boot,dm-pre-reloc;
734                         };
735
736                         pioB: gpio@fffff400 {
737                                 compatible = "atmel,at91rm9200-gpio";
738                                 reg = <0xfffff400 0x200>;
739                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
740                                 #gpio-cells = <2>;
741                                 gpio-controller;
742                                 interrupt-controller;
743                                 #interrupt-cells = <2>;
744                                 clocks = <&pioB_clk>;
745                                 u-boot,dm-pre-reloc;
746                         };
747
748                         pioC: gpio@fffff600 {
749                                 compatible = "atmel,at91rm9200-gpio";
750                                 reg = <0xfffff600 0x200>;
751                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
752                                 #gpio-cells = <2>;
753                                 gpio-controller;
754                                 interrupt-controller;
755                                 #interrupt-cells = <2>;
756                                 clocks = <&pioCDE_clk>;
757                                 u-boot,dm-pre-reloc;
758                         };
759
760                         pioD: gpio@fffff800 {
761                                 compatible = "atmel,at91rm9200-gpio";
762                                 reg = <0xfffff800 0x200>;
763                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
764                                 #gpio-cells = <2>;
765                                 gpio-controller;
766                                 interrupt-controller;
767                                 #interrupt-cells = <2>;
768                                 clocks = <&pioCDE_clk>;
769                                 u-boot,dm-pre-reloc;
770                         };
771
772                         pioE: gpio@fffffa00 {
773                                 compatible = "atmel,at91rm9200-gpio";
774                                 reg = <0xfffffa00 0x200>;
775                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
776                                 #gpio-cells = <2>;
777                                 gpio-controller;
778                                 interrupt-controller;
779                                 #interrupt-cells = <2>;
780                                 clocks = <&pioCDE_clk>;
781                                 u-boot,dm-pre-reloc;
782                         };
783
784                         dbgu: serial@ffffee00 {
785                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
786                                 reg = <0xffffee00 0x200>;
787                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
788                                 pinctrl-names = "default";
789                                 pinctrl-0 = <&pinctrl_dbgu>;
790                                 clocks = <&mck>;
791                                 clock-names = "usart";
792                                 status = "disabled";
793                         };
794
795                         usart0: serial@fff8c000 {
796                                 compatible = "atmel,at91sam9260-usart";
797                                 reg = <0xfff8c000 0x200>;
798                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
799                                 atmel,use-dma-rx;
800                                 atmel,use-dma-tx;
801                                 pinctrl-names = "default";
802                                 pinctrl-0 = <&pinctrl_usart0>;
803                                 clocks = <&usart0_clk>;
804                                 clock-names = "usart";
805                                 status = "disabled";
806                         };
807
808                         usart1: serial@fff90000 {
809                                 compatible = "atmel,at91sam9260-usart";
810                                 reg = <0xfff90000 0x200>;
811                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
812                                 atmel,use-dma-rx;
813                                 atmel,use-dma-tx;
814                                 pinctrl-names = "default";
815                                 pinctrl-0 = <&pinctrl_usart1>;
816                                 clocks = <&usart1_clk>;
817                                 clock-names = "usart";
818                                 status = "disabled";
819                         };
820
821                         usart2: serial@fff94000 {
822                                 compatible = "atmel,at91sam9260-usart";
823                                 reg = <0xfff94000 0x200>;
824                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
825                                 atmel,use-dma-rx;
826                                 atmel,use-dma-tx;
827                                 pinctrl-names = "default";
828                                 pinctrl-0 = <&pinctrl_usart2>;
829                                 clocks = <&usart2_clk>;
830                                 clock-names = "usart";
831                                 status = "disabled";
832                         };
833
834                         ssc0: ssc@fff98000 {
835                                 compatible = "atmel,at91rm9200-ssc";
836                                 reg = <0xfff98000 0x4000>;
837                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
838                                 pinctrl-names = "default";
839                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
840                                 clocks = <&ssc0_clk>;
841                                 clock-names = "pclk";
842                                 status = "disabled";
843                         };
844
845                         ssc1: ssc@fff9c000 {
846                                 compatible = "atmel,at91rm9200-ssc";
847                                 reg = <0xfff9c000 0x4000>;
848                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
849                                 pinctrl-names = "default";
850                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
851                                 clocks = <&ssc1_clk>;
852                                 clock-names = "pclk";
853                                 status = "disabled";
854                         };
855
856                         ac97: sound@fffa0000 {
857                                 compatible = "atmel,at91sam9263-ac97c";
858                                 reg = <0xfffa0000 0x4000>;
859                                 interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
860                                 pinctrl-names = "default";
861                                 pinctrl-0 = <&pinctrl_ac97>;
862                                 clocks = <&ac97_clk>;
863                                 clock-names = "ac97_clk";
864                                 status = "disabled";
865                         };
866
867                         macb0: ethernet@fffbc000 {
868                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
869                                 reg = <0xfffbc000 0x100>;
870                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
871                                 pinctrl-names = "default";
872                                 pinctrl-0 = <&pinctrl_macb_rmii>;
873                                 clocks = <&macb0_clk>, <&macb0_clk>;
874                                 clock-names = "hclk", "pclk";
875                                 status = "disabled";
876                         };
877
878                         usb1: gadget@fff78000 {
879                                 compatible = "atmel,at91sam9263-udc";
880                                 reg = <0xfff78000 0x4000>;
881                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
882                                 clocks = <&udc_clk>, <&udpck>;
883                                 clock-names = "pclk", "hclk";
884                                 status = "disabled";
885                         };
886
887                         i2c0: i2c@fff88000 {
888                                 compatible = "atmel,at91sam9260-i2c";
889                                 reg = <0xfff88000 0x100>;
890                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
891                                 #address-cells = <1>;
892                                 #size-cells = <0>;
893                                 clocks = <&twi0_clk>;
894                                 status = "disabled";
895                         };
896
897                         mmc0: mmc@fff80000 {
898                                 compatible = "atmel,hsmci";
899                                 reg = <0xfff80000 0x600>;
900                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
901                                 pinctrl-names = "default";
902                                 #address-cells = <1>;
903                                 #size-cells = <0>;
904                                 clocks = <&mci0_clk>;
905                                 clock-names = "mci_clk";
906                                 status = "disabled";
907                         };
908
909                         mmc1: mmc@fff84000 {
910                                 compatible = "atmel,hsmci";
911                                 reg = <0xfff84000 0x600>;
912                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
913                                 pinctrl-names = "default";
914                                 #address-cells = <1>;
915                                 #size-cells = <0>;
916                                 clocks = <&mci1_clk>;
917                                 clock-names = "mci_clk";
918                                 status = "disabled";
919                         };
920
921                         watchdog@fffffd40 {
922                                 compatible = "atmel,at91sam9260-wdt";
923                                 reg = <0xfffffd40 0x10>;
924                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
925                                 clocks = <&slow_xtal>;
926                                 atmel,watchdog-type = "hardware";
927                                 atmel,reset-type = "all";
928                                 atmel,dbg-halt;
929                                 status = "disabled";
930                         };
931
932                         spi0: spi@fffa4000 {
933                                 #address-cells = <1>;
934                                 #size-cells = <0>;
935                                 compatible = "atmel,at91rm9200-spi";
936                                 reg = <0xfffa4000 0x200>;
937                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
938                                 pinctrl-names = "default";
939                                 pinctrl-0 = <&pinctrl_spi0>;
940                                 clocks = <&spi0_clk>;
941                                 clock-names = "spi_clk";
942                                 status = "disabled";
943                         };
944
945                         spi1: spi@fffa8000 {
946                                 #address-cells = <1>;
947                                 #size-cells = <0>;
948                                 compatible = "atmel,at91rm9200-spi";
949                                 reg = <0xfffa8000 0x200>;
950                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
951                                 pinctrl-names = "default";
952                                 pinctrl-0 = <&pinctrl_spi1>;
953                                 clocks = <&spi1_clk>;
954                                 clock-names = "spi_clk";
955                                 status = "disabled";
956                         };
957
958                         pwm0: pwm@fffb8000 {
959                                 compatible = "atmel,at91sam9rl-pwm";
960                                 reg = <0xfffb8000 0x300>;
961                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
962                                 #pwm-cells = <3>;
963                                 clocks = <&pwm_clk>;
964                                 clock-names = "pwm_clk";
965                                 status = "disabled";
966                         };
967
968                         can: can@fffac000 {
969                                 compatible = "atmel,at91sam9263-can";
970                                 reg = <0xfffac000 0x300>;
971                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
972                                 pinctrl-names = "default";
973                                 pinctrl-0 = <&pinctrl_can_rx_tx>;
974                                 clocks = <&can_clk>;
975                                 clock-names = "can_clk";
976                         };
977
978                         rtc@fffffd20 {
979                                 compatible = "atmel,at91sam9260-rtt";
980                                 reg = <0xfffffd20 0x10>;
981                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
982                                 clocks = <&slow_xtal>;
983                                 status = "disabled";
984                         };
985
986                         rtc@fffffd50 {
987                                 compatible = "atmel,at91sam9260-rtt";
988                                 reg = <0xfffffd50 0x10>;
989                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
990                                 clocks = <&slow_xtal>;
991                                 status = "disabled";
992                         };
993
994                         gpbr: syscon@fffffd60 {
995                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
996                                 reg = <0xfffffd60 0x50>;
997                                 status = "disabled";
998                         };
999                 };
1000
1001                 fb0: fb@0x00700000 {
1002                         compatible = "atmel,at91sam9263-lcdc";
1003                         reg = <0x00700000 0x1000>;
1004                         interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
1005                         pinctrl-names = "default";
1006                         pinctrl-0 = <&pinctrl_fb>;
1007                         clocks = <&lcd_clk>, <&lcd_clk>;
1008                         clock-names = "lcdc_clk", "hclk";
1009                         status = "disabled";
1010                 };
1011
1012                 nand0: nand@40000000 {
1013                         compatible = "atmel,at91rm9200-nand";
1014                         #address-cells = <1>;
1015                         #size-cells = <1>;
1016                         reg = <0x40000000 0x10000000
1017                                0xffffe000 0x200
1018                               >;
1019                         atmel,nand-addr-offset = <21>;
1020                         atmel,nand-cmd-offset = <22>;
1021                         pinctrl-names = "default";
1022                         pinctrl-0 = <&pinctrl_nand>;
1023                         gpios = <&pioA 22 GPIO_ACTIVE_HIGH
1024                                  &pioD 15 GPIO_ACTIVE_HIGH
1025                                  0
1026                                 >;
1027                         status = "disabled";
1028                 };
1029
1030                 usb0: ohci@00a00000 {
1031                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1032                         reg = <0x00a00000 0x100000>;
1033                         interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
1034                         clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1035                         clock-names = "ohci_clk", "hclk", "uhpck";
1036                         status = "disabled";
1037                 };
1038         };
1039
1040         i2c-gpio-0 {
1041                 compatible = "i2c-gpio";
1042                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
1043                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
1044                         >;
1045                 i2c-gpio,sda-open-drain;
1046                 i2c-gpio,scl-open-drain;
1047                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1048                 #address-cells = <1>;
1049                 #size-cells = <0>;
1050                 status = "disabled";
1051         };
1052 };