2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
6 * Licensed under GPLv2 only.
9 #include "skeleton.dtsi"
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
16 model = "Atmel AT91SAM9261 family SoC";
17 compatible = "atmel,at91sam9261";
18 interrupt-parent = <&aic>;
41 compatible = "arm,arm926ej-s";
47 reg = <0x20000000 0x08000000>;
51 main_xtal: main_xtal {
52 compatible = "fixed-clock";
54 clock-frequency = <0>;
57 slow_xtal: slow_xtal {
58 compatible = "fixed-clock";
60 clock-frequency = <0>;
65 compatible = "mmio-sram";
66 reg = <0x00300000 0x28000>;
70 compatible = "simple-bus";
77 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
78 reg = <0x00500000 0x100000>;
79 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
80 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>;
81 clock-names = "ohci_clk", "hclk", "uhpck";
86 compatible = "atmel,at91sam9261-lcdc";
87 reg = <0x00600000 0x1000>;
88 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
89 pinctrl-names = "default";
90 pinctrl-0 = <&pinctrl_fb>;
91 clocks = <&lcd_clk>, <&hclk1>;
92 clock-names = "lcdc_clk", "hclk";
96 nand0: nand@40000000 {
97 compatible = "atmel,at91rm9200-nand";
100 reg = <0x40000000 0x10000000>;
101 atmel,nand-addr-offset = <22>;
102 atmel,nand-cmd-offset = <21>;
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_nand>;
106 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>,
107 <&pioC 14 GPIO_ACTIVE_HIGH>,
113 compatible = "simple-bus";
114 #address-cells = <1>;
119 tcb0: timer@fffa0000 {
120 compatible = "atmel,at91rm9200-tcb";
121 reg = <0xfffa0000 0x100>;
122 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>,
123 <18 IRQ_TYPE_LEVEL_HIGH 0>,
124 <19 IRQ_TYPE_LEVEL_HIGH 0>;
125 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>;
126 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
129 usb1: gadget@fffa4000 {
130 compatible = "atmel,at91sam9261-udc";
131 reg = <0xfffa4000 0x4000>;
132 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
133 clocks = <&udc_clk>, <&udpck>;
134 clock-names = "pclk", "hclk";
135 atmel,matrix = <&matrix>;
140 compatible = "atmel,hsmci";
141 reg = <0xfffa8000 0x600>;
142 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
143 pinctrl-names = "default";
144 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>;
145 #address-cells = <1>;
147 clocks = <&mci0_clk>;
148 clock-names = "mci_clk";
153 compatible = "atmel,at91sam9261-i2c";
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_i2c_twi>;
156 reg = <0xfffac000 0x100>;
157 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
158 #address-cells = <1>;
160 clocks = <&twi0_clk>;
164 usart0: serial@fffb0000 {
165 compatible = "atmel,at91sam9260-usart";
166 reg = <0xfffb0000 0x200>;
167 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_usart0>;
172 clocks = <&usart0_clk>;
173 clock-names = "usart";
177 usart1: serial@fffb4000 {
178 compatible = "atmel,at91sam9260-usart";
179 reg = <0xfffb4000 0x200>;
180 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
183 pinctrl-names = "default";
184 pinctrl-0 = <&pinctrl_usart1>;
185 clocks = <&usart1_clk>;
186 clock-names = "usart";
190 usart2: serial@fffb8000{
191 compatible = "atmel,at91sam9260-usart";
192 reg = <0xfffb8000 0x200>;
193 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
196 pinctrl-names = "default";
197 pinctrl-0 = <&pinctrl_usart2>;
198 clocks = <&usart2_clk>;
199 clock-names = "usart";
204 compatible = "atmel,at91rm9200-ssc";
205 reg = <0xfffbc000 0x4000>;
206 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
207 pinctrl-names = "default";
208 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
209 clocks = <&ssc0_clk>;
210 clock-names = "pclk";
215 compatible = "atmel,at91rm9200-ssc";
216 reg = <0xfffc0000 0x4000>;
217 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
220 clocks = <&ssc1_clk>;
221 clock-names = "pclk";
226 compatible = "atmel,at91rm9200-ssc";
227 reg = <0xfffc4000 0x4000>;
228 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
231 clocks = <&ssc2_clk>;
232 clock-names = "pclk";
237 #address-cells = <1>;
239 compatible = "atmel,at91rm9200-spi";
240 reg = <0xfffc8000 0x200>;
241 cs-gpios = <0>, <0>, <0>, <0>;
242 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_spi0>;
245 clocks = <&spi0_clk>;
246 clock-names = "spi_clk";
251 #address-cells = <1>;
253 compatible = "atmel,at91rm9200-spi";
254 reg = <0xfffcc000 0x200>;
255 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pinctrl_spi1>;
258 clocks = <&spi1_clk>;
259 clock-names = "spi_clk";
263 ramc: ramc@ffffea00 {
264 compatible = "atmel,at91sam9260-sdramc";
265 reg = <0xffffea00 0x200>;
268 matrix: matrix@ffffee00 {
269 compatible = "atmel,at91sam9260-bus-matrix", "syscon";
270 reg = <0xffffee00 0x200>;
273 aic: interrupt-controller@fffff000 {
274 #interrupt-cells = <3>;
275 compatible = "atmel,at91rm9200-aic";
276 interrupt-controller;
277 reg = <0xfffff000 0x200>;
278 atmel,external-irqs = <29 30 31>;
281 dbgu: serial@fffff200 {
282 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
283 reg = <0xfffff200 0x200>;
284 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
285 pinctrl-names = "default";
286 pinctrl-0 = <&pinctrl_dbgu>;
288 clock-names = "usart";
292 pioA: gpio@fffff400 {
293 compatible = "atmel,at91rm9200-gpio";
294 reg = <0xfffff400 0x200>;
295 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
298 interrupt-controller;
299 #interrupt-cells = <2>;
300 clocks = <&pioA_clk>;
304 pioB: gpio@fffff600 {
305 compatible = "atmel,at91rm9200-gpio";
306 reg = <0xfffff600 0x200>;
307 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
310 interrupt-controller;
311 #interrupt-cells = <2>;
312 clocks = <&pioB_clk>;
316 pioC: gpio@fffff800 {
317 compatible = "atmel,at91rm9200-gpio";
318 reg = <0xfffff800 0x200>;
319 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
322 interrupt-controller;
323 #interrupt-cells = <2>;
324 clocks = <&pioC_clk>;
329 #address-cells = <1>;
331 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
332 ranges = <0xfffff400 0xfffff400 0x600>;
333 reg = <0xfffff400 0x200 /* pioA */
334 0xfffff600 0x200 /* pioB */
335 0xfffff800 0x200 /* pioC */
339 <0xffffffff 0xfffffff7>, /* pioA */
340 <0xffffffff 0xfffffff4>, /* pioB */
341 <0xffffffff 0xffffff07>; /* pioC */
344 /* shared pinctrl settings */
347 pinctrl_dbgu: dbgu-0 {
349 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
350 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
355 pinctrl_usart0: usart0-0 {
357 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
358 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
361 pinctrl_usart0_rts: usart0_rts-0 {
363 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
366 pinctrl_usart0_cts: usart0_cts-0 {
368 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
373 pinctrl_usart1: usart1-0 {
375 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
376 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
379 pinctrl_usart1_rts: usart1_rts-0 {
381 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>;
384 pinctrl_usart1_cts: usart1_cts-0 {
386 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
391 pinctrl_usart2: usart2-0 {
393 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
394 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
397 pinctrl_usart2_rts: usart2_rts-0 {
399 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
402 pinctrl_usart2_cts: usart2_cts-0 {
404 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
409 pinctrl_nand: nand-0 {
411 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>,
412 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
417 pinctrl_mmc0_clk: mmc0_clk-0 {
419 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
422 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
424 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
425 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
428 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
430 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
431 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>,
432 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
437 pinctrl_ssc0_tx: ssc0_tx-0 {
439 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>,
440 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>,
441 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
444 pinctrl_ssc0_rx: ssc0_rx-0 {
446 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>,
447 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
448 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
453 pinctrl_ssc1_tx: ssc1_tx-0 {
455 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
456 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
457 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
460 pinctrl_ssc1_rx: ssc1_rx-0 {
462 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
463 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
464 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
469 pinctrl_ssc2_tx: ssc2_tx-0 {
471 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
472 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
473 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
476 pinctrl_ssc2_rx: ssc2_rx-0 {
478 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>,
479 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
480 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
485 pinctrl_spi0: spi0-0 {
487 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
488 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
489 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
494 pinctrl_spi1: spi1-0 {
496 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>,
497 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>,
498 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
503 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
504 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
507 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
508 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
511 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
512 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
515 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
516 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
519 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
520 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
523 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
524 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>;
527 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
528 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
531 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
532 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
535 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
536 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>;
541 pinctrl_i2c_bitbang: i2c-0-bitbang {
543 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>,
544 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
546 pinctrl_i2c_twi: i2c-0-twi {
548 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
549 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
556 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>,
557 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
558 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
559 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
560 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>,
561 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>,
562 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>,
563 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>,
564 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>,
565 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
566 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
567 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
568 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
569 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
570 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>,
571 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
572 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
573 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>,
574 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>,
575 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>,
576 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
582 compatible = "atmel,at91rm9200-pmc", "syscon";
583 reg = <0xfffffc00 0x100>;
584 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
585 interrupt-controller;
586 #address-cells = <1>;
588 #interrupt-cells = <1>;
592 compatible = "atmel,at91rm9200-clk-main-osc";
594 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
595 clocks = <&main_xtal>;
599 compatible = "atmel,at91rm9200-clk-main";
601 clocks = <&main_osc>;
605 compatible = "atmel,at91rm9200-clk-pll";
607 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
610 atmel,clk-input-range = <1000000 32000000>;
611 #atmel,pll-clk-output-range-cells = <4>;
612 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
613 <190000000 240000000 2 1>;
617 compatible = "atmel,at91rm9200-clk-pll";
619 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
622 atmel,clk-input-range = <1000000 5000000>;
623 #atmel,pll-clk-output-range-cells = <4>;
624 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
628 compatible = "atmel,at91rm9200-clk-master";
630 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
631 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
632 atmel,clk-output-range = <0 94000000>;
633 atmel,clk-divisors = <1 2 4 0>;
638 compatible = "atmel,at91rm9200-clk-usb";
640 atmel,clk-divisors = <1 2 4 0>;
645 compatible = "atmel,at91rm9200-clk-programmable";
646 #address-cells = <1>;
648 interrupt-parent = <&pmc>;
649 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
654 interrupts = <AT91_PMC_PCKRDY(0)>;
660 interrupts = <AT91_PMC_PCKRDY(1)>;
666 interrupts = <AT91_PMC_PCKRDY(2)>;
672 interrupts = <AT91_PMC_PCKRDY(3)>;
677 compatible = "atmel,at91rm9200-clk-system";
678 #address-cells = <1>;
731 compatible = "atmel,at91rm9200-clk-peripheral";
732 #address-cells = <1>;
737 pioA_clk: pioA_clk@2 {
743 pioB_clk: pioB_clk@3 {
749 pioC_clk: pioC_clk@4 {
755 usart0_clk: usart0_clk@6 {
760 usart1_clk: usart1_clk@7 {
765 usart2_clk: usart2_clk@8 {
770 mci0_clk: mci0_clk@9 {
775 udc_clk: udc_clk@10 {
780 twi0_clk: twi0_clk@11 {
785 spi0_clk: spi0_clk@12 {
790 spi1_clk: spi1_clk@13 {
795 ssc0_clk: ssc0_clk@14 {
800 ssc1_clk: ssc1_clk@15 {
805 ssc2_clk: ssc2_clk@16 {
810 tc0_clk: tc0_clk@17 {
815 tc1_clk: tc1_clk@18 {
820 tc2_clk: tc2_clk@19 {
825 ohci_clk: ohci_clk@20 {
830 lcd_clk: lcd_clk@21 {
838 compatible = "atmel,at91sam9260-rstc";
839 reg = <0xfffffd00 0x10>;
840 clocks = <&slow_xtal>;
844 compatible = "atmel,at91sam9260-shdwc";
845 reg = <0xfffffd10 0x10>;
846 clocks = <&slow_xtal>;
849 pit: timer@fffffd30 {
850 compatible = "atmel,at91sam9260-pit";
851 reg = <0xfffffd30 0xf>;
852 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
857 compatible = "atmel,at91sam9260-rtt";
858 reg = <0xfffffd20 0x10>;
859 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
860 clocks = <&slow_xtal>;
865 compatible = "atmel,at91sam9260-wdt";
866 reg = <0xfffffd40 0x10>;
867 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
868 clocks = <&slow_xtal>;
872 gpbr: syscon@fffffd50 {
873 compatible = "atmel,at91sam9260-gpbr", "syscon";
874 reg = <0xfffffd50 0x10>;
881 compatible = "i2c-gpio";
882 pinctrl-names = "default";
883 pinctrl-0 = <&pinctrl_i2c_bitbang>;
884 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */
885 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */
886 i2c-gpio,sda-open-drain;
887 i2c-gpio,scl-open-drain;
888 i2c-gpio,delay-us = <2>; /* ~100 kHz */
889 #address-cells = <1>;