2 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
6 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 * Licensed under GPLv2 or later.
11 #include "skeleton.dtsi"
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
43 compatible = "arm,arm926ej-s";
49 reg = <0x20000000 0x04000000>;
53 slow_xtal: slow_xtal {
54 compatible = "fixed-clock";
56 clock-frequency = <0>;
59 main_xtal: main_xtal {
60 compatible = "fixed-clock";
62 clock-frequency = <0>;
65 adc_op_clk: adc_op_clk{
66 compatible = "fixed-clock";
68 clock-frequency = <5000000>;
72 sram0: sram@002ff000 {
73 compatible = "mmio-sram";
74 reg = <0x002ff000 0x2000>;
78 compatible = "simple-bus";
85 compatible = "simple-bus";
91 aic: interrupt-controller@fffff000 {
92 #interrupt-cells = <3>;
93 compatible = "atmel,at91rm9200-aic";
95 reg = <0xfffff000 0x200>;
96 atmel,external-irqs = <29 30 31>;
99 ramc0: ramc@ffffea00 {
100 compatible = "atmel,at91sam9260-sdramc";
101 reg = <0xffffea00 0x200>;
105 compatible = "atmel,at91sam9260-pmc", "syscon";
106 reg = <0xfffffc00 0x100>;
107 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
108 interrupt-controller;
109 #address-cells = <1>;
111 #interrupt-cells = <1>;
115 compatible = "atmel,at91rm9200-clk-main-osc";
117 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
118 clocks = <&main_xtal>;
122 compatible = "atmel,at91rm9200-clk-main";
124 clocks = <&main_osc>;
127 slow_rc_osc: slow_rc_osc {
128 compatible = "fixed-clock";
130 clock-frequency = <32768>;
131 clock-accuracy = <50000000>;
135 compatible = "atmel,at91sam9260-clk-slow";
137 clocks = <&slow_rc_osc>, <&slow_xtal>;
141 compatible = "atmel,at91rm9200-clk-pll";
143 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
146 atmel,clk-input-range = <1000000 32000000>;
147 #atmel,pll-clk-output-range-cells = <4>;
148 atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
149 <150000000 240000000 2 1>;
153 compatible = "atmel,at91rm9200-clk-pll";
155 interrupts-extended = <&pmc AT91_PMC_LOCKB>;
158 atmel,clk-input-range = <1000000 5000000>;
159 #atmel,pll-clk-output-range-cells = <4>;
160 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
164 compatible = "atmel,at91rm9200-clk-master";
166 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
167 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
168 atmel,clk-output-range = <0 105000000>;
169 atmel,clk-divisors = <1 2 4 0>;
174 compatible = "atmel,at91rm9200-clk-usb";
176 atmel,clk-divisors = <1 2 4 0>;
181 compatible = "atmel,at91rm9200-clk-programmable";
182 #address-cells = <1>;
184 interrupt-parent = <&pmc>;
185 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
190 interrupts = <AT91_PMC_PCKRDY(0)>;
196 interrupts = <AT91_PMC_PCKRDY(1)>;
201 compatible = "atmel,at91rm9200-clk-system";
202 #address-cells = <1>;
231 compatible = "atmel,at91rm9200-clk-peripheral";
232 #address-cells = <1>;
237 pioA_clk: pioA_clk@2 {
243 pioB_clk: pioB_clk@3 {
249 pioC_clk: pioC_clk@4 {
260 usart0_clk: usart0_clk@6 {
265 usart1_clk: usart1_clk@7 {
270 usart2_clk: usart2_clk@8 {
275 mci0_clk: mci0_clk@9 {
280 udc_clk: udc_clk@10 {
285 twi0_clk: twi0_clk@11 {
290 spi0_clk: spi0_clk@12 {
295 spi1_clk: spi1_clk@13 {
300 ssc0_clk: ssc0_clk@14 {
305 tc0_clk: tc0_clk@17 {
310 tc1_clk: tc1_clk@18 {
315 tc2_clk: tc2_clk@19 {
320 ohci_clk: ohci_clk@20 {
325 macb0_clk: macb0_clk@21 {
330 isi_clk: isi_clk@22 {
335 usart3_clk: usart3_clk@23 {
340 uart0_clk: uart0_clk@24 {
345 uart1_clk: uart1_clk@25 {
350 tc3_clk: tc3_clk@26 {
355 tc4_clk: tc4_clk@27 {
360 tc5_clk: tc5_clk@28 {
368 compatible = "atmel,at91sam9260-rstc";
369 reg = <0xfffffd00 0x10>;
374 compatible = "atmel,at91sam9260-shdwc";
375 reg = <0xfffffd10 0x10>;
379 pit: timer@fffffd30 {
380 compatible = "atmel,at91sam9260-pit";
381 reg = <0xfffffd30 0xf>;
382 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
386 tcb0: timer@fffa0000 {
387 compatible = "atmel,at91rm9200-tcb";
388 reg = <0xfffa0000 0x100>;
389 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
390 18 IRQ_TYPE_LEVEL_HIGH 0
391 19 IRQ_TYPE_LEVEL_HIGH 0>;
392 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
393 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
396 tcb1: timer@fffdc000 {
397 compatible = "atmel,at91rm9200-tcb";
398 reg = <0xfffdc000 0x100>;
399 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
400 27 IRQ_TYPE_LEVEL_HIGH 0
401 28 IRQ_TYPE_LEVEL_HIGH 0>;
402 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
403 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
406 pioA: gpio@fffff400 {
407 compatible = "atmel,at91rm9200-gpio";
408 reg = <0xfffff400 0x200>;
409 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
412 interrupt-controller;
413 #interrupt-cells = <2>;
414 clocks = <&pioA_clk>;
418 pioB: gpio@fffff600 {
419 compatible = "atmel,at91rm9200-gpio";
420 reg = <0xfffff600 0x200>;
421 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
424 interrupt-controller;
425 #interrupt-cells = <2>;
426 clocks = <&pioB_clk>;
430 pioC: gpio@fffff800 {
431 compatible = "atmel,at91rm9200-gpio";
432 reg = <0xfffff800 0x200>;
433 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
436 interrupt-controller;
437 #interrupt-cells = <2>;
438 clocks = <&pioC_clk>;
443 #address-cells = <1>;
445 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
446 ranges = <0xfffff400 0xfffff400 0x600>;
447 reg = <0xfffff400 0x200 /* pioA */
448 0xfffff600 0x200 /* pioB */
449 0xfffff800 0x200 /* pioC */
454 0xffffffff 0xffc00c3b /* pioA */
455 0xffffffff 0x7fff3ccf /* pioB */
456 0xffffffff 0x007fffff /* pioC */
460 /* shared pinctrl settings */
463 pinctrl_dbgu: dbgu-0 {
465 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
466 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
471 pinctrl_usart0: usart0-0 {
473 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
474 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
477 pinctrl_usart0_rts: usart0_rts-0 {
479 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
482 pinctrl_usart0_cts: usart0_cts-0 {
484 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
487 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
489 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
490 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
493 pinctrl_usart0_dcd: usart0_dcd-0 {
495 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
498 pinctrl_usart0_ri: usart0_ri-0 {
500 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
505 pinctrl_usart1: usart1-0 {
507 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
508 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
511 pinctrl_usart1_rts: usart1_rts-0 {
513 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
516 pinctrl_usart1_cts: usart1_cts-0 {
518 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
523 pinctrl_usart2: usart2-0 {
525 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
526 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
529 pinctrl_usart2_rts: usart2_rts-0 {
531 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
534 pinctrl_usart2_cts: usart2_cts-0 {
536 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
541 pinctrl_usart3: usart3-0 {
543 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
544 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
547 pinctrl_usart3_rts: usart3_rts-0 {
549 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
552 pinctrl_usart3_cts: usart3_cts-0 {
554 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
559 pinctrl_uart0: uart0-0 {
561 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
562 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
567 pinctrl_uart1: uart1-0 {
569 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
570 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
575 pinctrl_nand: nand-0 {
577 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
578 AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
583 pinctrl_macb_rmii: macb_rmii-0 {
585 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
586 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
587 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
588 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
589 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
590 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
591 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
592 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
593 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
594 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
597 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
599 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
600 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
601 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
602 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
603 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
604 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
605 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
606 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
609 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
611 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
612 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
613 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
614 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
615 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
616 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
617 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
618 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
623 pinctrl_mmc0_clk: mmc0_clk-0 {
625 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
628 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
630 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
631 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
634 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
636 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
637 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
638 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
641 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
643 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
644 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
647 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
649 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
650 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
651 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
656 pinctrl_ssc0_tx: ssc0_tx-0 {
658 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
659 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
660 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
663 pinctrl_ssc0_rx: ssc0_rx-0 {
665 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
666 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
667 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
672 pinctrl_spi0: spi0-0 {
674 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
675 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
676 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
681 pinctrl_spi1: spi1-0 {
683 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
684 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
685 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
690 pinctrl_i2c_gpio0: i2c_gpio0-0 {
692 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
693 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
698 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
699 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
702 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
703 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
706 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
707 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
710 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
711 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
714 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
715 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
718 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
719 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
722 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
723 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
726 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
727 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
730 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
731 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
736 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
737 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
740 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
741 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
744 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
745 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
748 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
749 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
752 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
753 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
756 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
757 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
760 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
761 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
764 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
765 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
768 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
769 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
774 dbgu: serial@fffff200 {
775 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
776 reg = <0xfffff200 0x200>;
777 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
778 pinctrl-names = "default";
779 pinctrl-0 = <&pinctrl_dbgu>;
781 clock-names = "usart";
785 usart0: serial@fffb0000 {
786 compatible = "atmel,at91sam9260-usart";
787 reg = <0xfffb0000 0x200>;
788 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
791 pinctrl-names = "default";
792 pinctrl-0 = <&pinctrl_usart0>;
793 clocks = <&usart0_clk>;
794 clock-names = "usart";
798 usart1: serial@fffb4000 {
799 compatible = "atmel,at91sam9260-usart";
800 reg = <0xfffb4000 0x200>;
801 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
804 pinctrl-names = "default";
805 pinctrl-0 = <&pinctrl_usart1>;
806 clocks = <&usart1_clk>;
807 clock-names = "usart";
811 usart2: serial@fffb8000 {
812 compatible = "atmel,at91sam9260-usart";
813 reg = <0xfffb8000 0x200>;
814 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
817 pinctrl-names = "default";
818 pinctrl-0 = <&pinctrl_usart2>;
819 clocks = <&usart2_clk>;
820 clock-names = "usart";
824 usart3: serial@fffd0000 {
825 compatible = "atmel,at91sam9260-usart";
826 reg = <0xfffd0000 0x200>;
827 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
830 pinctrl-names = "default";
831 pinctrl-0 = <&pinctrl_usart3>;
832 clocks = <&usart3_clk>;
833 clock-names = "usart";
837 uart0: serial@fffd4000 {
838 compatible = "atmel,at91sam9260-usart";
839 reg = <0xfffd4000 0x200>;
840 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
843 pinctrl-names = "default";
844 pinctrl-0 = <&pinctrl_uart0>;
845 clocks = <&uart0_clk>;
846 clock-names = "usart";
850 uart1: serial@fffd8000 {
851 compatible = "atmel,at91sam9260-usart";
852 reg = <0xfffd8000 0x200>;
853 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
856 pinctrl-names = "default";
857 pinctrl-0 = <&pinctrl_uart1>;
858 clocks = <&uart1_clk>;
859 clock-names = "usart";
863 macb0: ethernet@fffc4000 {
864 compatible = "cdns,at91sam9260-macb", "cdns,macb";
865 reg = <0xfffc4000 0x100>;
866 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
867 pinctrl-names = "default";
868 pinctrl-0 = <&pinctrl_macb_rmii>;
869 clocks = <&macb0_clk>, <&macb0_clk>;
870 clock-names = "hclk", "pclk";
874 usb1: gadget@fffa4000 {
875 compatible = "atmel,at91sam9260-udc";
876 reg = <0xfffa4000 0x4000>;
877 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
878 clocks = <&udc_clk>, <&udpck>;
879 clock-names = "pclk", "hclk";
884 compatible = "atmel,at91sam9260-i2c";
885 reg = <0xfffac000 0x100>;
886 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
887 #address-cells = <1>;
889 clocks = <&twi0_clk>;
894 compatible = "atmel,hsmci";
895 reg = <0xfffa8000 0x600>;
896 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
897 #address-cells = <1>;
899 pinctrl-names = "default";
900 clocks = <&mci0_clk>;
901 clock-names = "mci_clk";
906 compatible = "atmel,at91rm9200-ssc";
907 reg = <0xfffbc000 0x4000>;
908 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
909 pinctrl-names = "default";
910 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
911 clocks = <&ssc0_clk>;
912 clock-names = "pclk";
917 #address-cells = <1>;
919 compatible = "atmel,at91rm9200-spi";
920 reg = <0xfffc8000 0x200>;
921 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
922 pinctrl-names = "default";
923 pinctrl-0 = <&pinctrl_spi0>;
924 clocks = <&spi0_clk>;
925 clock-names = "spi_clk";
930 #address-cells = <1>;
932 compatible = "atmel,at91rm9200-spi";
933 reg = <0xfffcc000 0x200>;
934 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
935 pinctrl-names = "default";
936 pinctrl-0 = <&pinctrl_spi1>;
937 clocks = <&spi1_clk>;
938 clock-names = "spi_clk";
943 #address-cells = <1>;
945 compatible = "atmel,at91sam9260-adc";
946 reg = <0xfffe0000 0x100>;
947 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
948 clocks = <&adc_clk>, <&adc_op_clk>;
949 clock-names = "adc_clk", "adc_op_clk";
950 atmel,adc-use-external-triggers;
951 atmel,adc-channels-used = <0xf>;
952 atmel,adc-vref = <3300>;
953 atmel,adc-startup-time = <15>;
954 atmel,adc-res = <8 10>;
955 atmel,adc-res-names = "lowres", "highres";
956 atmel,adc-use-res = "highres";
960 trigger-name = "timer-counter-0";
961 trigger-value = <0x1>;
965 trigger-name = "timer-counter-1";
966 trigger-value = <0x3>;
971 trigger-name = "timer-counter-2";
972 trigger-value = <0x5>;
977 trigger-name = "external";
978 trigger-value = <0xd>;
984 compatible = "atmel,at91sam9260-rtt";
985 reg = <0xfffffd20 0x10>;
986 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
992 compatible = "atmel,at91sam9260-wdt";
993 reg = <0xfffffd40 0x10>;
994 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
996 atmel,watchdog-type = "hardware";
997 atmel,reset-type = "all";
1002 gpbr: syscon@fffffd50 {
1003 compatible = "atmel,at91sam9260-gpbr", "syscon";
1004 reg = <0xfffffd50 0x10>;
1005 status = "disabled";
1009 nand0: nand@40000000 {
1010 compatible = "atmel,at91rm9200-nand";
1011 #address-cells = <1>;
1013 reg = <0x40000000 0x10000000
1016 atmel,nand-addr-offset = <21>;
1017 atmel,nand-cmd-offset = <22>;
1018 pinctrl-names = "default";
1019 pinctrl-0 = <&pinctrl_nand>;
1020 gpios = <&pioC 13 GPIO_ACTIVE_HIGH
1021 &pioC 14 GPIO_ACTIVE_HIGH
1024 status = "disabled";
1027 usb0: ohci@00500000 {
1028 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1029 reg = <0x00500000 0x100000>;
1030 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1031 clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1032 clock-names = "ohci_clk", "hclk", "uhpck";
1033 status = "disabled";
1038 compatible = "i2c-gpio";
1039 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
1040 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1042 i2c-gpio,sda-open-drain;
1043 i2c-gpio,scl-open-drain;
1044 i2c-gpio,delay-us = <2>; /* ~100 kHz */
1045 #address-cells = <1>;
1047 pinctrl-names = "default";
1048 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1049 status = "disabled";