arch/arm/dts/at91sam9260.dtsi

   1 /*
   2  * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
   3  *
   4  *  Copyright (C) 2011 Atmel,
   5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
   6  *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
   7  *
   8  * Licensed under GPLv2 or later.
   9  */
  10
  11 #include "skeleton.dtsi"
  12 #include <dt-bindings/pinctrl/at91.h>
  13 #include <dt-bindings/interrupt-controller/irq.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/clock/at91.h>
  16
  17 / {
  18         model = "Atmel AT91SAM9260 family SoC";
  19         compatible = "atmel,at91sam9260";
  20         interrupt-parent = <&aic>;
  21
  22         aliases {
  23                 serial0 = &dbgu;
  24                 serial1 = &usart0;
  25                 serial2 = &usart1;
  26                 serial3 = &usart2;
  27                 serial4 = &usart3;
  28                 serial5 = &uart0;
  29                 serial6 = &uart1;
  30                 gpio0 = &pioA;
  31                 gpio1 = &pioB;
  32                 gpio2 = &pioC;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 ssc0 = &ssc0;
  37         };
  38         cpus {
  39                 #address-cells = <0>;
  40                 #size-cells = <0>;
  41
  42                 cpu {
  43                         compatible = "arm,arm926ej-s";
  44                         device_type = "cpu";
  45                 };
  46         };
  47
  48         memory {
  49                 reg = <0x20000000 0x04000000>;
  50         };
  51
  52         clocks {
  53                 slow_xtal: slow_xtal {
  54                         compatible = "fixed-clock";
  55                         #clock-cells = <0>;
  56                         clock-frequency = <0>;
  57                 };
  58
  59                 main_xtal: main_xtal {
  60                         compatible = "fixed-clock";
  61                         #clock-cells = <0>;
  62                         clock-frequency = <0>;
  63                 };
  64
  65                 adc_op_clk: adc_op_clk{
  66                         compatible = "fixed-clock";
  67                         #clock-cells = <0>;
  68                         clock-frequency = <5000000>;
  69                 };
  70         };
  71
  72         sram0: sram@002ff000 {
  73                 compatible = "mmio-sram";
  74                 reg = <0x002ff000 0x2000>;
  75         };
  76
  77         ahb {
  78                 compatible = "simple-bus";
  79                 #address-cells = <1>;
  80                 #size-cells = <1>;
  81                 ranges;
  82                 u-boot,dm-pre-reloc;
  83
  84                 apb {
  85                         compatible = "simple-bus";
  86                         #address-cells = <1>;
  87                         #size-cells = <1>;
  88                         ranges;
  89                         u-boot,dm-pre-reloc;
  90
  91                         aic: interrupt-controller@fffff000 {
  92                                 #interrupt-cells = <3>;
  93                                 compatible = "atmel,at91rm9200-aic";
  94                                 interrupt-controller;
  95                                 reg = <0xfffff000 0x200>;
  96                                 atmel,external-irqs = <29 30 31>;
  97                         };
  98
  99                         ramc0: ramc@ffffea00 {
 100                                 compatible = "atmel,at91sam9260-sdramc";
 101                                 reg = <0xffffea00 0x200>;
 102                         };
 103
 104                         pmc: pmc@fffffc00 {
 105                                 compatible = "atmel,at91sam9260-pmc", "syscon";
 106                                 reg = <0xfffffc00 0x100>;
 107                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 108                                 interrupt-controller;
 109                                 #address-cells = <1>;
 110                                 #size-cells = <0>;
 111                                 #interrupt-cells = <1>;
 112                                 u-boot,dm-pre-reloc;
 113
 114                                 main_osc: main_osc {
 115                                         compatible = "atmel,at91rm9200-clk-main-osc";
 116                                         #clock-cells = <0>;
 117                                         interrupts-extended = <&pmc AT91_PMC_MOSCS>;
 118                                         clocks = <&main_xtal>;
 119                                 };
 120
 121                                 main: mainck {
 122                                         compatible = "atmel,at91rm9200-clk-main";
 123                                         #clock-cells = <0>;
 124                                         clocks = <&main_osc>;
 125                                 };
 126
 127                                 slow_rc_osc: slow_rc_osc {
 128                                         compatible = "fixed-clock";
 129                                         #clock-cells = <0>;
 130                                         clock-frequency = <32768>;
 131                                         clock-accuracy = <50000000>;
 132                                 };
 133
 134                                 clk32k: slck {
 135                                         compatible = "atmel,at91sam9260-clk-slow";
 136                                         #clock-cells = <0>;
 137                                         clocks = <&slow_rc_osc>, <&slow_xtal>;
 138                                 };
 139
 140                                 plla: pllack@0 {
 141                                         compatible = "atmel,at91rm9200-clk-pll";
 142                                         #clock-cells = <0>;
 143                                         interrupts-extended = <&pmc AT91_PMC_LOCKA>;
 144                                         clocks = <&main>;
 145                                         reg = <0>;
 146                                         atmel,clk-input-range = <1000000 32000000>;
 147                                         #atmel,pll-clk-output-range-cells = <4>;
 148                                         atmel,pll-clk-output-ranges = <80000000 160000000 0 1>,
 149                                                                 <150000000 240000000 2 1>;
 150                                 };
 151
 152                                 pllb: pllbck@1 {
 153                                         compatible = "atmel,at91rm9200-clk-pll";
 154                                         #clock-cells = <0>;
 155                                         interrupts-extended = <&pmc AT91_PMC_LOCKB>;
 156                                         clocks = <&main>;
 157                                         reg = <1>;
 158                                         atmel,clk-input-range = <1000000 5000000>;
 159                                         #atmel,pll-clk-output-range-cells = <4>;
 160                                         atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
 161                                 };
 162
 163                                 mck: masterck {
 164                                         compatible = "atmel,at91rm9200-clk-master";
 165                                         #clock-cells = <0>;
 166                                         interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
 167                                         clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
 168                                         atmel,clk-output-range = <0 105000000>;
 169                                         atmel,clk-divisors = <1 2 4 0>;
 170                                         u-boot,dm-pre-reloc;
 171                                 };
 172
 173                                 usb: usbck {
 174                                         compatible = "atmel,at91rm9200-clk-usb";
 175                                         #clock-cells = <0>;
 176                                         atmel,clk-divisors = <1 2 4 0>;
 177                                         clocks = <&pllb>;
 178                                 };
 179
 180                                 prog: progck {
 181                                         compatible = "atmel,at91rm9200-clk-programmable";
 182                                         #address-cells = <1>;
 183                                         #size-cells = <0>;
 184                                         interrupt-parent = <&pmc>;
 185                                         clocks = <&clk32k>, <&main>, <&plla>, <&pllb>;
 186
 187                                         prog0: prog@0 {
 188                                                 #clock-cells = <0>;
 189                                                 reg = <0>;
 190                                                 interrupts = <AT91_PMC_PCKRDY(0)>;
 191                                         };
 192
 193                                         prog1: prog@1 {
 194                                                 #clock-cells = <0>;
 195                                                 reg = <1>;
 196                                                 interrupts = <AT91_PMC_PCKRDY(1)>;
 197                                         };
 198                                 };
 199
 200                                 systemck {
 201                                         compatible = "atmel,at91rm9200-clk-system";
 202                                         #address-cells = <1>;
 203                                         #size-cells = <0>;
 204
 205                                         uhpck: uhpck@6 {
 206                                                 #clock-cells = <0>;
 207                                                 reg = <6>;
 208                                                 clocks = <&usb>;
 209                                         };
 210
 211                                         udpck: udpck@7 {
 212                                                 #clock-cells = <0>;
 213                                                 reg = <7>;
 214                                                 clocks = <&usb>;
 215                                         };
 216
 217                                         pck0: pck0@8 {
 218                                                 #clock-cells = <0>;
 219                                                 reg = <8>;
 220                                                 clocks = <&prog0>;
 221                                         };
 222
 223                                         pck1: pck1@9 {
 224                                                 #clock-cells = <0>;
 225                                                 reg = <9>;
 226                                                 clocks = <&prog1>;
 227                                         };
 228                                 };
 229
 230                                 periphck {
 231                                         compatible = "atmel,at91rm9200-clk-peripheral";
 232                                         #address-cells = <1>;
 233                                         #size-cells = <0>;
 234                                         clocks = <&mck>;
 235                                         u-boot,dm-pre-reloc;
 236
 237                                         pioA_clk: pioA_clk@2 {
 238                                                 #clock-cells = <0>;
 239                                                 reg = <2>;
 240                                                 u-boot,dm-pre-reloc;
 241                                         };
 242
 243                                         pioB_clk: pioB_clk@3 {
 244                                                 #clock-cells = <0>;
 245                                                 reg = <3>;
 246                                                 u-boot,dm-pre-reloc;
 247                                         };
 248
 249                                         pioC_clk: pioC_clk@4 {
 250                                                 #clock-cells = <0>;
 251                                                 reg = <4>;
 252                                                 u-boot,dm-pre-reloc;
 253                                         };
 254
 255                                         adc_clk: adc_clk@5 {
 256                                                 #clock-cells = <0>;
 257                                                 reg = <5>;
 258                                         };
 259
 260                                         usart0_clk: usart0_clk@6 {
 261                                                 #clock-cells = <0>;
 262                                                 reg = <6>;
 263                                         };
 264
 265                                         usart1_clk: usart1_clk@7 {
 266                                                 #clock-cells = <0>;
 267                                                 reg = <7>;
 268                                         };
 269
 270                                         usart2_clk: usart2_clk@8 {
 271                                                 #clock-cells = <0>;
 272                                                 reg = <8>;
 273                                         };
 274
 275                                         mci0_clk: mci0_clk@9 {
 276                                                 #clock-cells = <0>;
 277                                                 reg = <9>;
 278                                         };
 279
 280                                         udc_clk: udc_clk@10 {
 281                                                 #clock-cells = <0>;
 282                                                 reg = <10>;
 283                                         };
 284
 285                                         twi0_clk: twi0_clk@11 {
 286                                                 reg = <11>;
 287                                                 #clock-cells = <0>;
 288                                         };
 289
 290                                         spi0_clk: spi0_clk@12 {
 291                                                 #clock-cells = <0>;
 292                                                 reg = <12>;
 293                                         };
 294
 295                                         spi1_clk: spi1_clk@13 {
 296                                                 #clock-cells = <0>;
 297                                                 reg = <13>;
 298                                         };
 299
 300                                         ssc0_clk: ssc0_clk@14 {
 301                                                 #clock-cells = <0>;
 302                                                 reg = <14>;
 303                                         };
 304
 305                                         tc0_clk: tc0_clk@17 {
 306                                                 #clock-cells = <0>;
 307                                                 reg = <17>;
 308                                         };
 309
 310                                         tc1_clk: tc1_clk@18 {
 311                                                 #clock-cells = <0>;
 312                                                 reg = <18>;
 313                                         };
 314
 315                                         tc2_clk: tc2_clk@19 {
 316                                                 #clock-cells = <0>;
 317                                                 reg = <19>;
 318                                         };
 319
 320                                         ohci_clk: ohci_clk@20 {
 321                                                 #clock-cells = <0>;
 322                                                 reg = <20>;
 323                                         };
 324
 325                                         macb0_clk: macb0_clk@21 {
 326                                                 #clock-cells = <0>;
 327                                                 reg = <21>;
 328                                         };
 329
 330                                         isi_clk: isi_clk@22 {
 331                                                 #clock-cells = <0>;
 332                                                 reg = <22>;
 333                                         };
 334
 335                                         usart3_clk: usart3_clk@23 {
 336                                                 #clock-cells = <0>;
 337                                                 reg = <23>;
 338                                         };
 339
 340                                         uart0_clk: uart0_clk@24 {
 341                                                 #clock-cells = <0>;
 342                                                 reg = <24>;
 343                                         };
 344
 345                                         uart1_clk: uart1_clk@25 {
 346                                                 #clock-cells = <0>;
 347                                                 reg = <25>;
 348                                         };
 349
 350                                         tc3_clk: tc3_clk@26 {
 351                                                 #clock-cells = <0>;
 352                                                 reg = <26>;
 353                                         };
 354
 355                                         tc4_clk: tc4_clk@27 {
 356                                                 #clock-cells = <0>;
 357                                                 reg = <27>;
 358                                         };
 359
 360                                         tc5_clk: tc5_clk@28 {
 361                                                 #clock-cells = <0>;
 362                                                 reg = <28>;
 363                                         };
 364                                 };
 365                         };
 366
 367                         rstc@fffffd00 {
 368                                 compatible = "atmel,at91sam9260-rstc";
 369                                 reg = <0xfffffd00 0x10>;
 370                                 clocks = <&clk32k>;
 371                         };
 372
 373                         shdwc@fffffd10 {
 374                                 compatible = "atmel,at91sam9260-shdwc";
 375                                 reg = <0xfffffd10 0x10>;
 376                                 clocks = <&clk32k>;
 377                         };
 378
 379                         pit: timer@fffffd30 {
 380                                 compatible = "atmel,at91sam9260-pit";
 381                                 reg = <0xfffffd30 0xf>;
 382                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 383                                 clocks = <&mck>;
 384                         };
 385
 386                         tcb0: timer@fffa0000 {
 387                                 compatible = "atmel,at91rm9200-tcb";
 388                                 reg = <0xfffa0000 0x100>;
 389                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
 390                                               18 IRQ_TYPE_LEVEL_HIGH 0
 391                                               19 IRQ_TYPE_LEVEL_HIGH 0>;
 392                                 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>;
 393                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 394                         };
 395
 396                         tcb1: timer@fffdc000 {
 397                                 compatible = "atmel,at91rm9200-tcb";
 398                                 reg = <0xfffdc000 0x100>;
 399                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
 400                                               27 IRQ_TYPE_LEVEL_HIGH 0
 401                                               28 IRQ_TYPE_LEVEL_HIGH 0>;
 402                                 clocks = <&tc3_clk>, <&tc4_clk>, <&tc5_clk>, <&clk32k>;
 403                                 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
 404                         };
 405
 406                         pioA: gpio@fffff400 {
 407                                 compatible = "atmel,at91rm9200-gpio";
 408                                 reg = <0xfffff400 0x200>;
 409                                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 410                                 #gpio-cells = <2>;
 411                                 gpio-controller;
 412                                 interrupt-controller;
 413                                 #interrupt-cells = <2>;
 414                                 clocks = <&pioA_clk>;
 415                                 u-boot,dm-pre-reloc;
 416                         };
 417
 418                         pioB: gpio@fffff600 {
 419                                 compatible = "atmel,at91rm9200-gpio";
 420                                 reg = <0xfffff600 0x200>;
 421                                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 422                                 #gpio-cells = <2>;
 423                                 gpio-controller;
 424                                 interrupt-controller;
 425                                 #interrupt-cells = <2>;
 426                                 clocks = <&pioB_clk>;
 427                                 u-boot,dm-pre-reloc;
 428                         };
 429
 430                         pioC: gpio@fffff800 {
 431                                 compatible = "atmel,at91rm9200-gpio";
 432                                 reg = <0xfffff800 0x200>;
 433                                 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 434                                 #gpio-cells = <2>;
 435                                 gpio-controller;
 436                                 interrupt-controller;
 437                                 #interrupt-cells = <2>;
 438                                 clocks = <&pioC_clk>;
 439                                 u-boot,dm-pre-reloc;
 440                         };
 441
 442                         pinctrl@fffff400 {
 443                                 #address-cells = <1>;
 444                                 #size-cells = <1>;
 445                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 446                                 ranges = <0xfffff400 0xfffff400 0x600>;
 447                                 reg = <0xfffff400 0x200         /* pioA */
 448                                        0xfffff600 0x200         /* pioB */
 449                                        0xfffff800 0x200         /* pioC */
 450                                       >;
 451
 452                                 atmel,mux-mask = <
 453                                       /*    A         B     */
 454                                        0xffffffff 0xffc00c3b  /* pioA */
 455                                        0xffffffff 0x7fff3ccf  /* pioB */
 456                                        0xffffffff 0x007fffff  /* pioC */
 457                                       >;
 458                                 u-boot,dm-pre-reloc;
 459
 460                                 /* shared pinctrl settings */
 461                                 dbgu {
 462                                         u-boot,dm-pre-reloc;
 463                                         pinctrl_dbgu: dbgu-0 {
 464                                                 atmel,pins =
 465                                                         <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB14 periph A */
 466                                                          AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PB15 periph with pullup */
 467                                         };
 468                                 };
 469
 470                                 usart0 {
 471                                         pinctrl_usart0: usart0-0 {
 472                                                 atmel,pins =
 473                                                         <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A */
 474                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
 475                                         };
 476
 477                                         pinctrl_usart0_rts: usart0_rts-0 {
 478                                                 atmel,pins =
 479                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
 480                                         };
 481
 482                                         pinctrl_usart0_cts: usart0_cts-0 {
 483                                                 atmel,pins =
 484                                                         <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
 485                                         };
 486
 487                                         pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
 488                                                 atmel,pins =
 489                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB24 periph A */
 490                                                          AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
 491                                         };
 492
 493                                         pinctrl_usart0_dcd: usart0_dcd-0 {
 494                                                 atmel,pins =
 495                                                         <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
 496                                         };
 497
 498                                         pinctrl_usart0_ri: usart0_ri-0 {
 499                                                 atmel,pins =
 500                                                         <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
 501                                         };
 502                                 };
 503
 504                                 usart1 {
 505                                         pinctrl_usart1: usart1-0 {
 506                                                 atmel,pins =
 507                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
 508                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB7 periph A */
 509                                         };
 510
 511                                         pinctrl_usart1_rts: usart1_rts-0 {
 512                                                 atmel,pins =
 513                                                         <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
 514                                         };
 515
 516                                         pinctrl_usart1_cts: usart1_cts-0 {
 517                                                 atmel,pins =
 518                                                         <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
 519                                         };
 520                                 };
 521
 522                                 usart2 {
 523                                         pinctrl_usart2: usart2-0 {
 524                                                 atmel,pins =
 525                                                         <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
 526                                                          AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB9 periph A */
 527                                         };
 528
 529                                         pinctrl_usart2_rts: usart2_rts-0 {
 530                                                 atmel,pins =
 531                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 532                                         };
 533
 534                                         pinctrl_usart2_cts: usart2_cts-0 {
 535                                                 atmel,pins =
 536                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA5 periph A */
 537                                         };
 538                                 };
 539
 540                                 usart3 {
 541                                         pinctrl_usart3: usart3-0 {
 542                                                 atmel,pins =
 543                                                         <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB10 periph A with pullup */
 544                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
 545                                         };
 546
 547                                         pinctrl_usart3_rts: usart3_rts-0 {
 548                                                 atmel,pins =
 549                                                         <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 550                                         };
 551
 552                                         pinctrl_usart3_cts: usart3_cts-0 {
 553                                                 atmel,pins =
 554                                                         <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 555                                         };
 556                                 };
 557
 558                                 uart0 {
 559                                         pinctrl_uart0: uart0-0 {
 560                                                 atmel,pins =
 561                                                         <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA31 periph B with pullup */
 562                                                          AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 563                                         };
 564                                 };
 565
 566                                 uart1 {
 567                                         pinctrl_uart1: uart1-0 {
 568                                                 atmel,pins =
 569                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB12 periph A with pullup */
 570                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
 571                                         };
 572                                 };
 573
 574                                 nand {
 575                                         pinctrl_nand: nand-0 {
 576                                                 atmel,pins =
 577                                                         <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP     /* PC13 gpio RDY pin pull_up */
 578                                                          AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;   /* PC14 gpio enable pin pull_up */
 579                                         };
 580                                 };
 581
 582                                 macb {
 583                                         pinctrl_macb_rmii: macb_rmii-0 {
 584                                                 atmel,pins =
 585                                                         <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 586                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 587                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 588                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 589                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA16 periph A */
 590                                                          AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 591                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA18 periph A */
 592                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA19 periph A */
 593                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA20 periph A */
 594                                                          AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
 595                                         };
 596
 597                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 598                                                 atmel,pins =
 599                                                         <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B */
 600                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA23 periph B */
 601                                                          AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 602                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 603                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA26 periph B */
 604                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 605                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 606                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 607                                         };
 608
 609                                         pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
 610                                                 atmel,pins =
 611                                                         <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA10 periph B */
 612                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA11 periph B */
 613                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B */
 614                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 615                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA26 periph B */
 616                                                          AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 617                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 618                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 619                                         };
 620                                 };
 621
 622                                 mmc0 {
 623                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 624                                                 atmel,pins =
 625                                                         <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
 626                                         };
 627
 628                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 629                                                 atmel,pins =
 630                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 631                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;       /* PA6 periph A with pullup */
 632                                         };
 633
 634                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 635                                                 atmel,pins =
 636                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
 637                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA10 periph A with pullup */
 638                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA11 periph A with pullup */
 639                                         };
 640
 641                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 642                                                 atmel,pins =
 643                                                         <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
 644                                                          AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA0 periph B with pullup */
 645                                         };
 646
 647                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 648                                                 atmel,pins =
 649                                                         <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
 650                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
 651                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA3 periph B with pullup */
 652                                         };
 653                                 };
 654
 655                                 ssc0 {
 656                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 657                                                 atmel,pins =
 658                                                         <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A */
 659                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB17 periph A */
 660                                                          AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
 661                                         };
 662
 663                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 664                                                 atmel,pins =
 665                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB19 periph A */
 666                                                          AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB20 periph A */
 667                                                          AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
 668                                         };
 669                                 };
 670
 671                                 spi0 {
 672                                         pinctrl_spi0: spi0-0 {
 673                                                 atmel,pins =
 674                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A SPI0_MISO pin */
 675                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A SPI0_MOSI pin */
 676                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A SPI0_SPCK pin */
 677                                         };
 678                                 };
 679
 680                                 spi1 {
 681                                         pinctrl_spi1: spi1-0 {
 682                                                 atmel,pins =
 683                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A SPI1_MISO pin */
 684                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A SPI1_MOSI pin */
 685                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A SPI1_SPCK pin */
 686                                         };
 687                                 };
 688
 689                                 i2c_gpio0 {
 690                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 691                                                 atmel,pins =
 692                                                         <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
 693                                                          AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
 694                                         };
 695                                 };
 696
 697                                 tcb0 {
 698                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 699                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 700                                         };
 701
 702                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 703                                                 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 704                                         };
 705
 706                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 707                                                 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 708                                         };
 709
 710                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 711                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 712                                         };
 713
 714                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 715                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 716                                         };
 717
 718                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 719                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 720                                         };
 721
 722                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 723                                                 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 724                                         };
 725
 726                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 727                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 728                                         };
 729
 730                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 731                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 732                                         };
 733                                 };
 734
 735                                 tcb1 {
 736                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 737                                                 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 738                                         };
 739
 740                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 741                                                 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 742                                         };
 743
 744                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 745                                                 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 746                                         };
 747
 748                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 749                                                 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 750                                         };
 751
 752                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 753                                                 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 754                                         };
 755
 756                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 757                                                 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 758                                         };
 759
 760                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 761                                                 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 762                                         };
 763
 764                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 765                                                 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 766                                         };
 767
 768                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 769                                                 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 770                                         };
 771                                 };
 772                         };
 773
 774                         dbgu: serial@fffff200 {
 775                                 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
 776                                 reg = <0xfffff200 0x200>;
 777                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 778                                 pinctrl-names = "default";
 779                                 pinctrl-0 = <&pinctrl_dbgu>;
 780                                 clocks = <&mck>;
 781                                 clock-names = "usart";
 782                                 status = "disabled";
 783                         };
 784
 785                         usart0: serial@fffb0000 {
 786                                 compatible = "atmel,at91sam9260-usart";
 787                                 reg = <0xfffb0000 0x200>;
 788                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 789                                 atmel,use-dma-rx;
 790                                 atmel,use-dma-tx;
 791                                 pinctrl-names = "default";
 792                                 pinctrl-0 = <&pinctrl_usart0>;
 793                                 clocks = <&usart0_clk>;
 794                                 clock-names = "usart";
 795                                 status = "disabled";
 796                         };
 797
 798                         usart1: serial@fffb4000 {
 799                                 compatible = "atmel,at91sam9260-usart";
 800                                 reg = <0xfffb4000 0x200>;
 801                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 802                                 atmel,use-dma-rx;
 803                                 atmel,use-dma-tx;
 804                                 pinctrl-names = "default";
 805                                 pinctrl-0 = <&pinctrl_usart1>;
 806                                 clocks = <&usart1_clk>;
 807                                 clock-names = "usart";
 808                                 status = "disabled";
 809                         };
 810
 811                         usart2: serial@fffb8000 {
 812                                 compatible = "atmel,at91sam9260-usart";
 813                                 reg = <0xfffb8000 0x200>;
 814                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 815                                 atmel,use-dma-rx;
 816                                 atmel,use-dma-tx;
 817                                 pinctrl-names = "default";
 818                                 pinctrl-0 = <&pinctrl_usart2>;
 819                                 clocks = <&usart2_clk>;
 820                                 clock-names = "usart";
 821                                 status = "disabled";
 822                         };
 823
 824                         usart3: serial@fffd0000 {
 825                                 compatible = "atmel,at91sam9260-usart";
 826                                 reg = <0xfffd0000 0x200>;
 827                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 828                                 atmel,use-dma-rx;
 829                                 atmel,use-dma-tx;
 830                                 pinctrl-names = "default";
 831                                 pinctrl-0 = <&pinctrl_usart3>;
 832                                 clocks = <&usart3_clk>;
 833                                 clock-names = "usart";
 834                                 status = "disabled";
 835                         };
 836
 837                         uart0: serial@fffd4000 {
 838                                 compatible = "atmel,at91sam9260-usart";
 839                                 reg = <0xfffd4000 0x200>;
 840                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
 841                                 atmel,use-dma-rx;
 842                                 atmel,use-dma-tx;
 843                                 pinctrl-names = "default";
 844                                 pinctrl-0 = <&pinctrl_uart0>;
 845                                 clocks = <&uart0_clk>;
 846                                 clock-names = "usart";
 847                                 status = "disabled";
 848                         };
 849
 850                         uart1: serial@fffd8000 {
 851                                 compatible = "atmel,at91sam9260-usart";
 852                                 reg = <0xfffd8000 0x200>;
 853                                 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
 854                                 atmel,use-dma-rx;
 855                                 atmel,use-dma-tx;
 856                                 pinctrl-names = "default";
 857                                 pinctrl-0 = <&pinctrl_uart1>;
 858                                 clocks = <&uart1_clk>;
 859                                 clock-names = "usart";
 860                                 status = "disabled";
 861                         };
 862
 863                         macb0: ethernet@fffc4000 {
 864                                 compatible = "cdns,at91sam9260-macb", "cdns,macb";
 865                                 reg = <0xfffc4000 0x100>;
 866                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
 867                                 pinctrl-names = "default";
 868                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 869                                 clocks = <&macb0_clk>, <&macb0_clk>;
 870                                 clock-names = "hclk", "pclk";
 871                                 status = "disabled";
 872                         };
 873
 874                         usb1: gadget@fffa4000 {
 875                                 compatible = "atmel,at91sam9260-udc";
 876                                 reg = <0xfffa4000 0x4000>;
 877                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
 878                                 clocks = <&udc_clk>, <&udpck>;
 879                                 clock-names = "pclk", "hclk";
 880                                 status = "disabled";
 881                         };
 882
 883                         i2c0: i2c@fffac000 {
 884                                 compatible = "atmel,at91sam9260-i2c";
 885                                 reg = <0xfffac000 0x100>;
 886                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 887                                 #address-cells = <1>;
 888                                 #size-cells = <0>;
 889                                 clocks = <&twi0_clk>;
 890                                 status = "disabled";
 891                         };
 892
 893                         mmc0: mmc@fffa8000 {
 894                                 compatible = "atmel,hsmci";
 895                                 reg = <0xfffa8000 0x600>;
 896                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
 897                                 #address-cells = <1>;
 898                                 #size-cells = <0>;
 899                                 pinctrl-names = "default";
 900                                 clocks = <&mci0_clk>;
 901                                 clock-names = "mci_clk";
 902                                 status = "disabled";
 903                         };
 904
 905                         ssc0: ssc@fffbc000 {
 906                                 compatible = "atmel,at91rm9200-ssc";
 907                                 reg = <0xfffbc000 0x4000>;
 908                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 909                                 pinctrl-names = "default";
 910                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 911                                 clocks = <&ssc0_clk>;
 912                                 clock-names = "pclk";
 913                                 status = "disabled";
 914                         };
 915
 916                         spi0: spi@fffc8000 {
 917                                 #address-cells = <1>;
 918                                 #size-cells = <0>;
 919                                 compatible = "atmel,at91rm9200-spi";
 920                                 reg = <0xfffc8000 0x200>;
 921                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
 922                                 pinctrl-names = "default";
 923                                 pinctrl-0 = <&pinctrl_spi0>;
 924                                 clocks = <&spi0_clk>;
 925                                 clock-names = "spi_clk";
 926                                 status = "disabled";
 927                         };
 928
 929                         spi1: spi@fffcc000 {
 930                                 #address-cells = <1>;
 931                                 #size-cells = <0>;
 932                                 compatible = "atmel,at91rm9200-spi";
 933                                 reg = <0xfffcc000 0x200>;
 934                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 935                                 pinctrl-names = "default";
 936                                 pinctrl-0 = <&pinctrl_spi1>;
 937                                 clocks = <&spi1_clk>;
 938                                 clock-names = "spi_clk";
 939                                 status = "disabled";
 940                         };
 941
 942                         adc0: adc@fffe0000 {
 943                                 #address-cells = <1>;
 944                                 #size-cells = <0>;
 945                                 compatible = "atmel,at91sam9260-adc";
 946                                 reg = <0xfffe0000 0x100>;
 947                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
 948                                 clocks = <&adc_clk>, <&adc_op_clk>;
 949                                 clock-names = "adc_clk", "adc_op_clk";
 950                                 atmel,adc-use-external-triggers;
 951                                 atmel,adc-channels-used = <0xf>;
 952                                 atmel,adc-vref = <3300>;
 953                                 atmel,adc-startup-time = <15>;
 954                                 atmel,adc-res = <8 10>;
 955                                 atmel,adc-res-names = "lowres", "highres";
 956                                 atmel,adc-use-res = "highres";
 957
 958                                 trigger@0 {
 959                                         reg = <0>;
 960                                         trigger-name = "timer-counter-0";
 961                                         trigger-value = <0x1>;
 962                                 };
 963                                 trigger@1 {
 964                                         reg = <1>;
 965                                         trigger-name = "timer-counter-1";
 966                                         trigger-value = <0x3>;
 967                                 };
 968
 969                                 trigger@2 {
 970                                         reg = <2>;
 971                                         trigger-name = "timer-counter-2";
 972                                         trigger-value = <0x5>;
 973                                 };
 974
 975                                 trigger@3 {
 976                                         reg = <3>;
 977                                         trigger-name = "external";
 978                                         trigger-value = <0xd>;
 979                                         trigger-external;
 980                                 };
 981                         };
 982
 983                         rtc@fffffd20 {
 984                                 compatible = "atmel,at91sam9260-rtt";
 985                                 reg = <0xfffffd20 0x10>;
 986                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 987                                 clocks = <&clk32k>;
 988                                 status = "disabled";
 989                         };
 990
 991                         watchdog@fffffd40 {
 992                                 compatible = "atmel,at91sam9260-wdt";
 993                                 reg = <0xfffffd40 0x10>;
 994                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 995                                 clocks = <&clk32k>;
 996                                 atmel,watchdog-type = "hardware";
 997                                 atmel,reset-type = "all";
 998                                 atmel,dbg-halt;
 999                                 status = "disabled";
1000                         };
1001
1002                         gpbr: syscon@fffffd50 {
1003                                 compatible = "atmel,at91sam9260-gpbr", "syscon";
1004                                 reg = <0xfffffd50 0x10>;
1005                                 status = "disabled";
1006                         };
1007                 };
1008
1009                 nand0: nand@40000000 {
1010                         compatible = "atmel,at91rm9200-nand";
1011                         #address-cells = <1>;
1012                         #size-cells = <1>;
1013                         reg = <0x40000000 0x10000000
1014                                0xffffe800 0x200
1015                               >;
1016                         atmel,nand-addr-offset = <21>;
1017                         atmel,nand-cmd-offset = <22>;
1018                         pinctrl-names = "default";
1019                         pinctrl-0 = <&pinctrl_nand>;
1020                         gpios = <&pioC 13 GPIO_ACTIVE_HIGH
1021                                  &pioC 14 GPIO_ACTIVE_HIGH
1022                                  0
1023                                 >;
1024                         status = "disabled";
1025                 };
1026
1027                 usb0: ohci@00500000 {
1028                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
1029                         reg = <0x00500000 0x100000>;
1030                         interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
1031                         clocks = <&ohci_clk>, <&ohci_clk>, <&uhpck>;
1032                         clock-names = "ohci_clk", "hclk", "uhpck";
1033                         status = "disabled";
1034                 };
1035         };
1036
1037         i2c@0 {
1038                 compatible = "i2c-gpio";
1039                 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
1040                          &pioA 24 GPIO_ACTIVE_HIGH /* scl */
1041                         >;
1042                 i2c-gpio,sda-open-drain;
1043                 i2c-gpio,scl-open-drain;
1044                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
1045                 #address-cells = <1>;
1046                 #size-cells = <0>;
1047                 pinctrl-names = "default";
1048                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
1049                 status = "disabled";
1050         };
1051 };