1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 SolidRun ltd
6 #include "armada-8040.dtsi"
9 model = "ClearFog-GT-8K";
10 compatible = "solidrun,clearfog-gt-8k",
14 stdout-path = "serial0:115200n8";
24 device_type = "memory";
25 reg = <0x0 0x0 0x0 0x80000000>;
29 compatible = "simple-bus";
31 reg_usb3h0_vbus: usb3-vbus0 {
32 compatible = "regulator-fixed";
33 pinctrl-names = "default";
34 pinctrl-0 = <&cpm_xhci_vbus_pins>;
35 regulator-name = "reg-usb3h0-vbus";
36 regulator-min-microvolt = <5000000>;
37 regulator-max-microvolt = <5000000>;
38 startup-delay-us = <300000>;
39 shutdown-delay-us = <500000>;
40 regulator-force-boot-off;
41 gpio = <&cpm_gpio1 15 GPIO_ACTIVE_LOW>; /* GPIO[47] */
56 /* 0 1 2 3 4 5 6 7 8 9 */
57 pin-func = < 1 1 1 1 1 1 1 1 1 1
58 1 3 0 0 0 0 0 0 0 3 >;
63 pinctrl-names = "default";
64 pinctrl-0 = <&ap_emmc_pins>;
72 * [0-31] = 0xff: Keep default CP0_shared_pins:
73 * [11] CLKOUT_MPP_11 (out)
74 * [23] LINK_RD_IN_CP2CP (in)
75 * [25] CLKOUT_MPP_25 (out)
76 * [29] AVS_FB_IN_CP2CP (in)
77 * [32, 33, 34] pci0/1/2 reset
78 * [35-38] CP0 I2C1 and I2C0
79 * [39] GPIO reset button
80 * [40,41] LED0 and LED1
82 * [47] USB VBUS EN (active low)
84 * [49] SFP+ present signal
90 * [55] Micro SD card detect
93 /* 0 1 2 3 4 5 6 7 8 9 */
94 pin-func = < 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
95 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
96 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
97 0xff 0 0 0 0 2 2 2 2 0
99 0 0 0 0 0 0 0xe 0xe 0xe 0xe
102 cpm_xhci_vbus_pins: cpm-xhci-vbus-pins {
103 marvell,pins = < 47 >;
104 marvell,function = <0>;
107 cps_1g_phy_reset: cps-1g-phy-reset {
108 marvell,pins = < 43 >;
109 marvell,function = <0>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&cpm_sdhci_pins>;
127 pinctrl-names = "default";
128 pinctrl-0 = <&cpm_i2c0_pins>;
130 clock-frequency = <100000>;
134 pinctrl-names = "default";
135 pinctrl-0 = <&cpm_i2c1_pins>;
137 clock-frequency = <100000>;
146 * CP0 Serdes Configuration:
148 * Lane 1: Not connected
150 * Lane 3: Not connected
151 * Lane 4: USB 3.0 host port1 (can be PCIe)
152 * Lane 5: Not connected
155 phy-type = <PHY_TYPE_PEX0>;
158 phy-type = <PHY_TYPE_UNCONNECTED>;
161 phy-type = <PHY_TYPE_SFI>;
164 phy-type = <PHY_TYPE_UNCONNECTED>;
167 phy-type = <PHY_TYPE_USB3_HOST1>;
170 phy-type = <PHY_TYPE_UNCONNECTED>;
175 pinctrl-names = "default";
190 vbus-supply = <®_usb3h0_vbus>;
203 * [7] CP1 SPI0 CSn1 (FXS)
204 * [8] CP1 SPI0 CSn0 (TPM)
205 * [9.11]CP1 SPI0 MOSI/MISO/CLK
206 * [13] CP1 SPI1 MISO (TDM and SPI ROM shared)
207 * [14] CP1 SPI1 CS0n (64Mb SPI ROM)
208 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)
209 * [16] CP1 SPI1 CLK (TDM and SPI ROM shared)
210 * [24] Topaz switch reset
214 * [29] CP0 10G SFP TX Disable
216 * [31] Front panel button
217 * [32-62] = 0xff: Keep default CP1_shared_pins:
219 /* 0 1 2 3 4 5 6 7 8 9 */
220 pin-func = < 0x4 0x4 0x4 0x4 0x4 0x4 0x0 0x4 0x4 0x4
221 0x4 0x4 0x0 0x3 0x3 0x3 0x3 0xff 0xff 0xff
222 0xff 0xff 0xff 0xff 0x0 0xff 0x0 0x8 0x8 0x0
223 0x0 0x0 0x0 0xff 0xff 0xff 0xff 0xff 0xff 0xff
224 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
225 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff
230 pinctrl-names = "default";
231 pinctrl-0 = <&cps_spi1_pins>;
235 compatible = "jedec,spi-nor", "spi-flash";
237 spi-max-frequency = <10000000>;
240 compatible = "fixed-partitions";
241 #address-cells = <1>;
249 label = "Filesystem";
250 reg = <0x200000 0xce0000>;
258 * CP1 Serdes Configuration:
259 * Lane 0: SATA 1 (RX swapped). Can be PCIe0
262 * Lane 3: SGMII1 - Connected to 1512 port
264 * Lane 5: SGMII2 - Connected to Topaz switch
267 phy-type = <PHY_TYPE_SATA1>;
268 phy-invert = <PHY_POLARITY_RXD_INVERT>;
271 phy-type = <PHY_TYPE_UNCONNECTED>;
274 phy-type = <PHY_TYPE_USB3_HOST0>;
277 phy-type = <PHY_TYPE_SGMII1>;
278 phy-speed = <PHY_SPEED_1_25G>;
281 phy-type = <PHY_TYPE_UNCONNECTED>;
284 phy-type = <PHY_TYPE_SGMII2>;
285 phy-speed = <PHY_SPEED_3_125G>;
290 phy0: ethernet-phy@0 {
296 pinctrl-names = "default";
297 pinctrl-0 = <&cps_1g_phy_reset>;
306 phy-reset-gpios = <&cpm_gpio1 11 GPIO_ACTIVE_LOW>;
309 /* 2.5G to Topaz switch */
314 phy-reset-gpios = <&cps_gpio0 24 GPIO_ACTIVE_LOW>;