1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/gpio.h>
4 #include "armada-385.dtsi"
7 model = "Allied Telesis x530";
8 compatible = "alliedtelesis,x530", "marvell,armada385", "marvell,armada380";
11 stdout-path = "serial0:115200n8";
12 bootargs = "console=ttyS0,115200 earlyprintk";
21 device_type = "memory";
22 reg = <0 0x00000000 0 0x40000000>; /* 1 GB */
26 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
27 MBUS_ID(0x01, 0x3d) 0 0xf4800000 0x80000
28 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
30 pcie-mem-aperture = <0xa0000000 0x40000000>;
33 eco-button-interrupt {
34 compatible = "atl,eco-button-interrupt";
35 eco-button-gpio = <&gpio0 14 GPIO_ACTIVE_LOW>;
39 compatible = "atl,phy_reset";
40 /* Physical board layout of reset pin is active-low but for the
41 * current driver we have to set it to active-high here.
43 phy-reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>,
44 <&gpio1 21 GPIO_ACTIVE_HIGH>;
48 compatible = "linux,uio-pdrv-genirq";
49 interrupt-parent = <&gpio0>;
50 interrupts = <6 IRQ_TYPE_EDGE_BOTH>;
54 compatible = "atl,led-enable";
55 led-enable-gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
59 compatible = "atl,of-led-7seg";
72 compatible = "atl,periph-poe";
73 poe-reset-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
74 interrupt-parent = <&gpio0>;
75 interrupts = <20 IRQ_TYPE_EDGE_BOTH>;
88 compatible = "marvell,mvebu-devbus";
91 devbus,bus-width = <8>;
92 devbus,turn-off-ps = <60000>;
93 devbus,badr-skew-ps = <0>;
94 devbus,acc-first-ps = <124000>;
95 devbus,acc-next-ps = <248000>;
96 devbus,rd-setup-ps = <0>;
97 devbus,rd-hold-ps = <0>;
99 /* Write parameters */
100 devbus,sync-enable = <0>;
101 devbus,wr-high-ps = <60000>;
102 devbus,wr-low-ps = <60000>;
103 devbus,ale-wr-ps = <60000>;
108 compatible = "mtd-ram";
109 reg = <0 0x00080000>;
118 gpios = <16 GPIO_ACTIVE_HIGH>;
120 line-name = "poe-disable";
127 gpios = <15 GPIO_ACTIVE_HIGH>;
129 line-name = "poe-mezz-reset";
134 clock-frequency = <100000>;
138 #address-cells = <1>;
140 compatible = "nxp,pca9544";
142 i2c-mux-idle-disconnect;
144 i2c@0 { /* POE devices MUX */
145 #address-cells = <1>;
151 #address-cells = <1>;
156 compatible = "maxim,ds2476";
161 compatible = "adi,adt7476";
166 compatible = "adi,adt7476";
173 #address-cells = <1>;
178 compatible = "dallas,ds1340";
184 #address-cells = <1>;
188 led_7seg_gpio: gpio@20 {
189 compatible = "nxp,pca9554";
195 sfpgpio: gpio@27 { /* I2C to GPIO */
196 compatible = "nxp,pca9555";
200 interrupt-parent = <&gpio0>;
201 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
204 sfpmux: mux@77 { /* SFP I2C MUX */
205 #address-cells = <1>;
207 compatible = "nxp,pca9544";
209 i2c-mux-idle-disconnect;
219 #address-cells = <1>;
221 compatible = "jedec,spi-nor";
222 reg = <0>; /* Chip select 0 */
223 spi-max-frequency = <50000000>;
227 reg = <0x00000000 0x00100000>;
230 partition@u-boot-env {
231 reg = <0x00100000 0x00040000>;
232 label = "u-boot-env";
235 reg = <0x00140000 0x00e80000>;
239 reg = <0x00fc0000 0x00040000>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&uart0_pins>;
256 clock-frequency = <25000000>;
259 &nand_controller { /* 256 MB */
262 nand-ecc-strength = <4>;
263 nand-ecc-step-size = <512>;
264 marvell,nand-enable-arbiter;