2 * Device Tree file for Marvell Armada 385 development board
5 * Copyright (C) 2014 Marvell
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
10 * of the GPL or the X11 license, at your option. Note that this dual
11 * licensing only applies to this file, and not this project as a
14 * a) This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without
16 * any warranty of any kind, whether express or implied.
20 * b) Permission is hereby granted, free of charge, to any person
21 * obtaining a copy of this software and associated documentation
22 * files (the "Software"), to deal in the Software without
23 * restriction, including without limitation the rights to use,
24 * copy, modify, merge, publish, distribute, sublicense, and/or
25 * sell copies of the Software, and to permit persons to whom the
26 * Software is furnished to do so, subject to the following
29 * The above copyright notice and this permission notice shall be
30 * included in all copies or substantial portions of the Software.
32 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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43 #include "armada-385.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
47 model = "Marvell Armada 385 AMC";
48 compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380";
51 stdout-path = "serial0:115200n8";
62 device_type = "memory";
63 reg = <0x00000000 0x80000000>; /* 2 GB */
67 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
68 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
72 clock-frequency = <100000>;
73 u-boot,i2c-slave-addr = <0x0>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&i2c0_pins>;
81 * Exported on the micro USB connector CON16
85 pinctrl-names = "default";
86 pinctrl-0 = <&uart0_pins>;
102 pinctrl-names = "default";
104 * The Reference Clock 0 is used to provide a
107 pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
110 phy-mode = "rgmii-id";
115 pinctrl-names = "default";
116 pinctrl-0 = <&mdio_pins>;
118 phy0: ethernet-phy@1 {
122 phy1: ethernet-phy@0 {
130 marvell,nand-keep-config;
131 marvell,nand-enable-arbiter;
148 pinctrl-names = "default";
149 pinctrl-0 = <&spi1_pins>;
155 #address-cells = <1>;
157 compatible = "st,m25p128", "jedec,spi-nor", "spi-flash";
158 reg = <0>; /* Chip select 0 */
159 spi-max-frequency = <50000000>;
165 clock-frequency = <20000000>;