arch/arm/dts/armada-37xx.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 37xx family of SoCs.
   3  *
   4  * Copyright (C) 2016 Marvell
   5  *
   6  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   7  *
   8  * This file is dual-licensed: you can use it either under the terms
   9  * of the GPL or the X11 license, at your option. Note that this dual
  10  * licensing only applies to this file, and not this project as a
  11  * whole.
  12  *
  13  *  a) This file is free software; you can redistribute it and/or
  14  *     modify it under the terms of the GNU General Public License as
  15  *     published by the Free Software Foundation; either version 2 of the
  16  *     License, or (at your option) any later version.
  17  *
  18  *     This file is distributed in the hope that it will be useful
  19  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  *     GNU General Public License for more details.
  22  *
  23  * Or, alternatively
  24  *
  25  *  b) Permission is hereby granted, free of charge, to any person
  26  *     obtaining a copy of this software and associated documentation
  27  *     files (the "Software"), to deal in the Software without
  28  *     restriction, including without limitation the rights to use
  29  *     copy, modify, merge, publish, distribute, sublicense, and/or
  30  *     sell copies of the Software, and to permit persons to whom the
  31  *     Software is furnished to do so, subject to the following
  32  *     conditions:
  33  *
  34  *     The above copyright notice and this permission notice shall be
  35  *     included in all copies or substantial portions of the Software.
  36  *
  37  *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
  38  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  39  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  40  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  41  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
  42  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  43  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  44  *     OTHER DEALINGS IN THE SOFTWARE.
  45  */
  46
  47 #include <dt-bindings/interrupt-controller/arm-gic.h>
  48 #include <dt-bindings/comphy/comphy_data.h>
  49 #include <dt-bindings/gpio/gpio.h>
  50
  51 / {
  52         model = "Marvell Armada 37xx SoC";
  53         compatible = "marvell,armada3700";
  54         interrupt-parent = <&gic>;
  55         #address-cells = <2>;
  56         #size-cells = <2>;
  57
  58         aliases {
  59                 serial0 = &uart0;
  60         };
  61
  62         cpus {
  63                 #address-cells = <1>;
  64                 #size-cells = <0>;
  65                 cpu@0 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a53", "arm,armv8";
  68                         reg = <0>;
  69                         enable-method = "psci";
  70                 };
  71         };
  72
  73         psci {
  74                 compatible = "arm,psci-0.2";
  75                 method = "smc";
  76         };
  77
  78         timer {
  79                 compatible = "arm,armv8-timer";
  80                 interrupts = <GIC_PPI 13
  81                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
  82                              <GIC_PPI 14
  83                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
  84                              <GIC_PPI 11
  85                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>,
  86                              <GIC_PPI 10
  87                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  88         };
  89
  90         soc {
  91                 compatible = "simple-bus";
  92                 #address-cells = <2>;
  93                 #size-cells = <2>;
  94                 ranges;
  95
  96                 internal-regs {
  97                         #address-cells = <1>;
  98                         #size-cells = <1>;
  99                         compatible = "simple-bus";
 100                         /* 32M internal register @ 0xd000_0000 */
 101                         ranges = <0x0 0x0 0xd0000000 0x2000000>;
 102
 103                         uart0: serial@12000 {
 104                                 compatible = "marvell,armada-3700-uart";
 105                                 reg = <0x12000 0x400>;
 106                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 107                                 status = "disabled";
 108                         };
 109
 110                         nb_periph_clk: nb-periph-clk@13000 {
 111                                 compatible = "marvell,armada-3700-periph-clock-nb";
 112                                 reg = <0x13000 0x100>;
 113                                 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>;
 114                                 #clock-cells = <1>;
 115                         };
 116
 117                         sb_periph_clk: sb-periph-clk@18000 {
 118                                 compatible = "marvell,armada-3700-periph-clock-sb";
 119                                 reg = <0x18000 0x100>;
 120                                 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>;
 121                                 #clock-cells = <1>;
 122                         };
 123
 124                         tbg: tbg@13200 {
 125                                 compatible = "marvell,armada-3700-tbg-clock";
 126                                 reg = <0x13200 0x100>;
 127                                 #clock-cells = <1>;
 128                         };
 129
 130                         pinctrl_nb: pinctrl-nb@13800 {
 131                                 compatible = "marvell,armada3710-nb-pinctrl",
 132                                 "syscon", "simple-mfd";
 133                                 reg = <0x13800 0x100>, <0x13C00 0x20>;
 134                                 gpionb: gpionb {
 135                                         #gpio-cells = <2>;
 136                                         gpio-ranges = <&pinctrl_nb 0 0 36>;
 137                                         gpio-controller;
 138                                         interrupts =
 139                                         <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 140                                         <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 141                                         <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 142                                         <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 143                                         <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 144                                         <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 145                                         <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 146                                         <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 147                                         <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
 148                                         <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
 149                                         <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
 150                                         <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 151
 152                                 };
 153
 154                                 spi_quad_pins: spi-quad-pins {
 155                                         groups = "spi_quad";
 156                                         function = "spi";
 157                                 };
 158
 159                                 i2c1_pins: i2c1-pins {
 160                                         groups = "i2c1";
 161                                         function = "i2c";
 162                                 };
 163
 164                                 i2c2_pins: i2c2-pins {
 165                                         groups = "i2c2";
 166                                         function = "i2c";
 167                                 };
 168
 169                                 uart1_pins: uart1-pins {
 170                                         groups = "uart1";
 171                                         function = "uart";
 172                                 };
 173
 174                                 uart2_pins: uart2-pins {
 175                                         groups = "uart2";
 176                                         function = "uart";
 177                                 };
 178
 179                                 mmc_pins: mmc-pins {
 180                                         groups = "emmc_nb";
 181                                         function = "emmc";
 182                                 };
 183                         };
 184
 185                         pinctrl_sb: pinctrl-sb@18800 {
 186                                 compatible = "marvell,armada3710-sb-pinctrl",
 187                                 "syscon", "simple-mfd";
 188                                 reg = <0x18800 0x100>, <0x18C00 0x20>;
 189                                 gpiosb: gpiosb {
 190                                         #gpio-cells = <2>;
 191                                         gpio-ranges = <&pinctrl_sb 0 0 30>;
 192                                         gpio-controller;
 193                                         interrupts =
 194                                         <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
 195                                         <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
 196                                         <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
 197                                         <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
 198                                         <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 199                                 };
 200
 201                                 rgmii_pins: mii-pins {
 202                                         groups = "rgmii";
 203                                         function = "mii";
 204                                 };
 205
 206                                 smi_pins: smi-pins {
 207                                         groups = "smi";
 208                                         function = "smi";
 209                                 };
 210
 211                                 sdio_pins: sdio-pins {
 212                                         groups = "sdio_sb";
 213                                         function = "sdio";
 214                                 };
 215
 216                                 pcie_pins: pcie-pins {
 217                                         groups = "pcie1";
 218                                         function = "gpio";
 219                                 };
 220                         };
 221
 222                         usb3: usb@58000 {
 223                                 compatible = "marvell,armada3700-xhci",
 224                                 "generic-xhci";
 225                                 reg = <0x58000 0x4000>;
 226                                 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 227                                 status = "disabled";
 228                         };
 229
 230                         usb2: usb@5e000 {
 231                                 compatible = "marvell,armada3700-ehci";
 232                                 reg = <0x5e000 0x450>;
 233                                 status = "disabled";
 234                         };
 235
 236                         xor@60900 {
 237                                 compatible = "marvell,armada-3700-xor";
 238                                 reg = <0x60900 0x100
 239                                        0x60b00 0x100>;
 240
 241                                 xor10 {
 242                                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 243                                 };
 244                                 xor11 {
 245                                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 246                                 };
 247                         };
 248
 249                         sdhci0: sdhci@d0000 {
 250                                 compatible = "marvell,armada-3700-sdhci",
 251                                 "marvell,sdhci-xenon";
 252                                 reg = <0xd0000 0x300
 253                                        0x1e808 0x4>;
 254                                 status = "disabled";
 255                         };
 256
 257                         sdhci1: sdhci@d8000 {
 258                                 compatible = "marvell,armada-3700-sdhci",
 259                                 "marvell,sdhci-xenon";
 260                                 reg = <0xd8000 0x300
 261                                        0x17808 0x4>;
 262                                 status = "disabled";
 263                         };
 264
 265                         sata: sata@e0000 {
 266                                 compatible = "marvell,armada-3700-ahci";
 267                                 reg = <0xe0000 0x2000>;
 268                                 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 269                                 status = "disabled";
 270                         };
 271
 272                         gic: interrupt-controller@1d00000 {
 273                                 compatible = "arm,gic-v3";
 274                                 #interrupt-cells = <3>;
 275                                 interrupt-controller;
 276                                 reg = <0x1d00000 0x10000>, /* GICD */
 277                                       <0x1d40000 0x40000>; /* GICR */
 278                         };
 279
 280                         eth0: neta@30000 {
 281                                 compatible = "marvell,armada-3700-neta";
 282                                 reg = <0x30000 0x20>;
 283                                 status = "disabled";
 284                         };
 285
 286                         eth1: neta@40000 {
 287                                 compatible = "marvell,armada-3700-neta";
 288                                 reg = <0x40000 0x20>;
 289                                 status = "disabled";
 290                         };
 291
 292                         i2c0: i2c@11000 {
 293                                 compatible = "marvell,armada-3700-i2c";
 294                                 reg = <0x11000 0x100>;
 295                                 status = "disabled";
 296                         };
 297
 298                         spi0: spi@10600 {
 299                                 compatible = "marvell,armada-3700-spi";
 300                                 reg = <0x10600 0x50>;
 301                                 #address-cells = <1>;
 302                                 #size-cells = <0>;
 303                                 #clock-cells = <0>;
 304                                 spi-max-frequency = <50000000>;
 305                                 clocks = <&nb_periph_clk 7>;
 306                                 status = "disabled";
 307                         };
 308
 309                         comphy: comphy@18300 {
 310                                 compatible = "marvell,mvebu-comphy", "marvell,comphy-armada-3700";
 311                                 reg = <0x18300 0x28>,
 312                                       <0x1f300 0x3d000>;
 313                                 mux-bitcount = <4>;
 314                                 mux-lane-order = <1 0 2>;
 315                                 max-lanes = <3>;
 316                         };
 317                 };
 318
 319                 pcie0: pcie@d0070000 {
 320                         compatible = "marvell,armada-37xx-pcie";
 321                         reg = <0 0xd0070000 0 0x20000>;
 322                         #address-cells = <3>;
 323                         #size-cells = <2>;
 324                         device_type = "pci";
 325                         num-lanes = <1>;
 326                         status = "disabled";
 327
 328                         bus-range = <0 0xff>;
 329                         ranges = <0x82000000 0 0xe8000000
 330                                  0 0xe8000000 0 0x1000000 /* Port 0 MEM */
 331                                  0x81000000 0 0xe9000000
 332                                  0 0xe9000000 0 0x10000>; /* Port 0 IO*/
 333                 };
 334         };
 335 };