arch/arm/dts/am43x-epos-evm.dts

   1 /*
   2  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /* AM43x EPOS EVM */
  10
  11 /dts-v1/;
  12
  13 #include "am4372.dtsi"
  14 #include <dt-bindings/pinctrl/am43xx.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include <dt-bindings/pwm/pwm.h>
  17 #include <dt-bindings/sound/tlv320aic31xx-micbias.h>
  18
  19 / {
  20         model = "TI AM43x EPOS EVM";
  21         compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";
  22
  23         aliases {
  24                 display0 = &lcd0;
  25         };
  26
  27         chosen {
  28                 stdout-path = &uart0;
  29                 tick-timer = &timer2;
  30         };
  31
  32         vmmcsd_fixed: fixedregulator-sd {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "vmmcsd_fixed";
  35                 regulator-min-microvolt = <3300000>;
  36                 regulator-max-microvolt = <3300000>;
  37                 enable-active-high;
  38         };
  39
  40         vbat: fixedregulator@0 {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "vbat";
  43                 regulator-min-microvolt = <5000000>;
  44                 regulator-max-microvolt = <5000000>;
  45                 regulator-boot-on;
  46         };
  47
  48         lcd0: display {
  49                 compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
  50                 label = "lcd";
  51
  52                 panel-timing {
  53                         clock-frequency = <33000000>;
  54                         hactive = <800>;
  55                         vactive = <480>;
  56                         hfront-porch = <210>;
  57                         hback-porch = <16>;
  58                         hsync-len = <30>;
  59                         vback-porch = <10>;
  60                         vfront-porch = <22>;
  61                         vsync-len = <13>;
  62                         hsync-active = <0>;
  63                         vsync-active = <0>;
  64                         de-active = <1>;
  65                         pixelclk-active = <1>;
  66                 };
  67
  68                 port {
  69                         lcd_in: endpoint {
  70                                 remote-endpoint = <&dpi_out>;
  71                         };
  72                 };
  73         };
  74
  75         matrix_keypad: matrix_keypad@0 {
  76                 compatible = "gpio-matrix-keypad";
  77                 debounce-delay-ms = <5>;
  78                 col-scan-delay-us = <2>;
  79
  80                 row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH         /* Bank0, pin12 */
  81                              &gpio0 13 GPIO_ACTIVE_HIGH         /* Bank0, pin13 */
  82                              &gpio0 14 GPIO_ACTIVE_HIGH         /* Bank0, pin14 */
  83                              &gpio0 15 GPIO_ACTIVE_HIGH>;       /* Bank0, pin15 */
  84
  85                 col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH          /* Bank3, pin9 */
  86                              &gpio3 10 GPIO_ACTIVE_HIGH         /* Bank3, pin10 */
  87                              &gpio2 18 GPIO_ACTIVE_HIGH         /* Bank2, pin18 */
  88                              &gpio2 19 GPIO_ACTIVE_HIGH>;       /* Bank2, pin19 */
  89
  90                 linux,keymap = <0x00000201      /* P1 */
  91                         0x01000204      /* P4 */
  92                         0x02000207      /* P7 */
  93                         0x0300020a      /* NUMERIC_STAR */
  94                         0x00010202      /* P2 */
  95                         0x01010205      /* P5 */
  96                         0x02010208      /* P8 */
  97                         0x03010200      /* P0 */
  98                         0x00020203      /* P3 */
  99                         0x01020206      /* P6 */
 100                         0x02020209      /* P9 */
 101                         0x0302020b      /* NUMERIC_POUND */
 102                         0x00030067      /* UP */
 103                         0x0103006a      /* RIGHT */
 104                         0x0203006c      /* DOWN */
 105                         0x03030069>;    /* LEFT */
 106         };
 107
 108         backlight {
 109                 compatible = "pwm-backlight";
 110                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
 111                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
 112                 default-brightness-level = <8>;
 113         };
 114
 115         sound0: sound@0 {
 116                 compatible = "simple-audio-card";
 117                 simple-audio-card,name = "AM43-EPOS-EVM";
 118                 simple-audio-card,widgets =
 119                         "Microphone", "Microphone Jack",
 120                         "Headphone", "Headphone Jack",
 121                         "Speaker", "Speaker";
 122                 simple-audio-card,routing =
 123                         "MIC1LP", "Microphone Jack",
 124                         "MIC1RP", "Microphone Jack",
 125                         "MIC1LP", "MICBIAS",
 126                         "MIC1RP", "MICBIAS",
 127                         "Headphone Jack", "HPL",
 128                         "Headphone Jack", "HPR",
 129                         "Speaker", "SPL",
 130                         "Speaker", "SPR";
 131                 simple-audio-card,format = "dsp_b";
 132                 simple-audio-card,bitclock-master = <&sound0_master>;
 133                 simple-audio-card,frame-master = <&sound0_master>;
 134                 simple-audio-card,bitclock-inversion;
 135
 136                 simple-audio-card,cpu {
 137                         sound-dai = <&mcasp1>;
 138                         system-clock-frequency = <12000000>;
 139                 };
 140
 141                 sound0_master: simple-audio-card,codec {
 142                         sound-dai = <&tlv320aic3111>;
 143                         system-clock-frequency = <12000000>;
 144                 };
 145         };
 146 };
 147
 148 &am43xx_pinmux {
 149                 cpsw_default: cpsw_default {
 150                         pinctrl-single,pins = <
 151                                 /* Slave 1 */
 152                                 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs */
 153                                 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
 154                                 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txen.rmii1_txen */
 155                                 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxdv.rmii1_rxdv */
 156                                 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd1.rmii1_txd1 */
 157                                 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1)    /* mii1_txd0.rmii1_txd0 */
 158                                 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
 159                                 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
 160                                 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
 161                         >;
 162                 };
 163
 164                 cpsw_sleep: cpsw_sleep {
 165                         pinctrl-single,pins = <
 166                                 /* Slave 1 reset value */
 167                                 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 168                                 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
 169                                 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 170                                 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 171                                 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 172                                 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 173                                 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 174                                 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 175                                 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
 176                         >;
 177                 };
 178
 179                 davinci_mdio_default: davinci_mdio_default {
 180                         pinctrl-single,pins = <
 181                                 /* MDIO */
 182                                 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 183                                 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 184                         >;
 185                 };
 186
 187                 davinci_mdio_sleep: davinci_mdio_sleep {
 188                         pinctrl-single,pins = <
 189                                 /* MDIO reset value */
 190                                 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 191                                 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 192                         >;
 193                 };
 194
 195                 i2c0_pins: pinmux_i2c0_pins {
 196                         pinctrl-single,pins = <
 197                                 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_sda.i2c0_sda */
 198                                 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* i2c0_scl.i2c0_scl */
 199                         >;
 200                 };
 201
 202                 nand_flash_x8: nand_flash_x8 {
 203                         pinctrl-single,pins = <
 204                                 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7)    /* gpmc_a0.SELQSPIorNAND/GPIO */
 205                                 AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad0.gpmc_ad0 */
 206                                 AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad1.gpmc_ad1 */
 207                                 AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad2.gpmc_ad2 */
 208                                 AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad3.gpmc_ad3 */
 209                                 AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad4.gpmc_ad4 */
 210                                 AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad5.gpmc_ad5 */
 211                                 AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad6.gpmc_ad6 */
 212                                 AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* gpmc_ad7.gpmc_ad7 */
 213                                 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
 214                                 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7)      /* gpmc_wpn.gpmc_wpn */
 215                                 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0  */
 216                                 AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
 217                                 AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
 218                                 AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
 219                                 AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
 220                         >;
 221                 };
 222
 223                 ecap0_pins: backlight_pins {
 224                         pinctrl-single,pins = <
 225                                 AM4372_IOPAD(0x964, MUX_MODE0)         /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
 226                         >;
 227                 };
 228
 229                 i2c2_pins: pinmux_i2c2_pins {
 230                         pinctrl-single,pins = <
 231                                 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_sda.i2c2_sda */
 232                                 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8)    /* i2c2_scl.i2c2_scl */
 233                         >;
 234                 };
 235
 236                 spi0_pins: pinmux_spi0_pins {
 237                         pinctrl-single,pins = <
 238                                 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0)           /* spi0_clk.spi0_clk */
 239                                 AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0)           /* spi0_d0.spi0_d0 */
 240                                 AM4372_IOPAD(0x958, PIN_INPUT | MUX_MODE0)           /* spi0_d1.spi0_d1 */
 241                                 AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0)          /* spi0_cs0.spi0_cs0 */
 242                         >;
 243                 };
 244
 245                 spi1_pins: pinmux_spi1_pins {
 246                         pinctrl-single,pins = <
 247                                 AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3)           /* mcasp0_aclkx.spi1_clk */
 248                                 AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3)           /* mcasp0_fsx.spi1_d0 */
 249                                 AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3)           /* mcasp0_axr0.spi1_d1 */
 250                                 AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3)          /* mcasp0_ahclkr.spi1_cs0 */
 251                         >;
 252                 };
 253
 254                 mmc1_pins: pinmux_mmc1_pins {
 255                         pinctrl-single,pins = <
 256                                 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 257                         >;
 258                 };
 259
 260                 qspi1_default: qspi1_default {
 261                         pinctrl-single,pins = <
 262                                 AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
 263                                 AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
 264                                 AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
 265                                 AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
 266                                 AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
 267                                 AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
 268                         >;
 269                 };
 270
 271                 pixcir_ts_pins: pixcir_ts_pins {
 272                         pinctrl-single,pins = <
 273                                 AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7)       /* gpmc_a1.gpio1_17 */
 274                         >;
 275                 };
 276
 277                 hdq_pins: pinmux_hdq_pins {
 278                         pinctrl-single,pins = <
 279                                 AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1)    /* cam1_wen.hdq_gpio */
 280                         >;
 281                 };
 282
 283                 dss_pins: dss_pins {
 284                         pinctrl-single,pins = <
 285                                 AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
 286                                 AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
 287                                 AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
 288                                 AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
 289                                 AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
 290                                 AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
 291                                 AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
 292                                 AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
 293                                 AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
 294                                 AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 295                                 AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 296                                 AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
 297                                 AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 298                                 AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 299                                 AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 300                                 AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 301                                 AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 302                                 AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 303                                 AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 304                                 AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
 305                                 AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
 306                                 AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
 307                                 AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
 308                                 AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
 309                                 AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
 310                                 AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
 311                                 AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
 312                                 AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
 313                         >;
 314                 };
 315
 316                 display_mux_pins: display_mux_pins {
 317                         pinctrl-single,pins = <
 318                                 /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
 319                                 AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
 320                         >;
 321                 };
 322
 323                 vpfe1_pins_default: vpfe1_pins_default {
 324                         pinctrl-single,pins = <
 325                                 AM4372_IOPAD(0x9cc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data9 mode 0 */
 326                                 AM4372_IOPAD(0x9d0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data8 mode 0 */
 327                                 AM4372_IOPAD(0x9d4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_hd mode 0 */
 328                                 AM4372_IOPAD(0x9d8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_vd mode 0 */
 329                                 AM4372_IOPAD(0x9dc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_pclk mode 0 */
 330                                 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data0 mode 0 */
 331                                 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data1 mode 0 */
 332                                 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data2 mode 0 */
 333                                 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data3 mode 0 */
 334                                 AM4372_IOPAD(0x9f8, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data4 mode 0 */
 335                                 AM4372_IOPAD(0x9fc, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data5 mode 0 */
 336                                 AM4372_IOPAD(0xa00, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data6 mode 0 */
 337                                 AM4372_IOPAD(0xa04, PIN_INPUT_PULLUP | MUX_MODE0)  /* cam1_data7 mode 0 */
 338                         >;
 339                 };
 340
 341                 vpfe1_pins_sleep: vpfe1_pins_sleep {
 342                         pinctrl-single,pins = <
 343                                 AM4372_IOPAD(0x9cc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 344                                 AM4372_IOPAD(0x9d0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 345                                 AM4372_IOPAD(0x9d4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 346                                 AM4372_IOPAD(0x9d8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 347                                 AM4372_IOPAD(0x9dc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 348                                 AM4372_IOPAD(0x9e8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 349                                 AM4372_IOPAD(0x9ec, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 350                                 AM4372_IOPAD(0x9f0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 351                                 AM4372_IOPAD(0x9f4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 352                                 AM4372_IOPAD(0x9f8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 353                                 AM4372_IOPAD(0x9fc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 354                                 AM4372_IOPAD(0xa00, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 355                                 AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
 356                         >;
 357                 };
 358
 359                 mcasp1_pins: mcasp1_pins {
 360                         pinctrl-single,pins = <
 361                                 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
 362                                 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
 363                                 AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
 364                                 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
 365                         >;
 366                 };
 367
 368                 mcasp1_sleep_pins: mcasp1_sleep_pins {
 369                         pinctrl-single,pins = <
 370                                 AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 371                                 AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 372                                 AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 373                                 AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
 374                         >;
 375                 };
 376 };
 377
 378 &mmc1 {
 379         status = "okay";
 380         vmmc-supply = <&vmmcsd_fixed>;
 381         bus-width = <4>;
 382         pinctrl-names = "default";
 383         pinctrl-0 = <&mmc1_pins>;
 384         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 385 };
 386
 387 &mac {
 388         pinctrl-names = "default", "sleep";
 389         pinctrl-0 = <&cpsw_default>;
 390         pinctrl-1 = <&cpsw_sleep>;
 391         status = "okay";
 392 };
 393
 394 &davinci_mdio {
 395         pinctrl-names = "default", "sleep";
 396         pinctrl-0 = <&davinci_mdio_default>;
 397         pinctrl-1 = <&davinci_mdio_sleep>;
 398         status = "okay";
 399 };
 400
 401 &cpsw_emac0 {
 402         phy_id = <&davinci_mdio>, <16>;
 403         phy-mode = "rmii";
 404 };
 405
 406 &cpsw_emac1 {
 407         phy_id = <&davinci_mdio>, <1>;
 408         phy-mode = "rmii";
 409 };
 410
 411 &phy_sel {
 412         rmii-clock-ext;
 413 };
 414
 415 &i2c0 {
 416         status = "okay";
 417         pinctrl-names = "default";
 418         pinctrl-0 = <&i2c0_pins>;
 419         clock-frequency = <400000>;
 420
 421         tps65218: tps65218@24 {
 422                 reg = <0x24>;
 423                 compatible = "ti,tps65218";
 424                 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
 425                 interrupt-controller;
 426                 #interrupt-cells = <2>;
 427
 428                 dcdc1: regulator-dcdc1 {
 429                         compatible = "ti,tps65218-dcdc1";
 430                         regulator-name = "vdd_core";
 431                         regulator-min-microvolt = <912000>;
 432                         regulator-max-microvolt = <1144000>;
 433                         regulator-boot-on;
 434                         regulator-always-on;
 435                 };
 436
 437                 dcdc2: regulator-dcdc2 {
 438                         compatible = "ti,tps65218-dcdc2";
 439                         regulator-name = "vdd_mpu";
 440                         regulator-min-microvolt = <912000>;
 441                         regulator-max-microvolt = <1378000>;
 442                         regulator-boot-on;
 443                         regulator-always-on;
 444                 };
 445
 446                 dcdc3: regulator-dcdc3 {
 447                         compatible = "ti,tps65218-dcdc3";
 448                         regulator-name = "vdcdc3";
 449                         regulator-min-microvolt = <1500000>;
 450                         regulator-max-microvolt = <1500000>;
 451                         regulator-boot-on;
 452                         regulator-always-on;
 453                 };
 454
 455                 dcdc4: regulator-dcdc4 {
 456                         compatible = "ti,tps65218-dcdc4";
 457                         regulator-name = "vdcdc4";
 458                         regulator-min-microvolt = <3300000>;
 459                         regulator-max-microvolt = <3300000>;
 460                         regulator-boot-on;
 461                         regulator-always-on;
 462                 };
 463
 464                 dcdc5: regulator-dcdc5 {
 465                         compatible = "ti,tps65218-dcdc5";
 466                         regulator-name = "v1_0bat";
 467                         regulator-min-microvolt = <1000000>;
 468                         regulator-max-microvolt = <1000000>;
 469                 };
 470
 471                 dcdc6: regulator-dcdc6 {
 472                         compatible = "ti,tps65218-dcdc6";
 473                         regulator-name = "v1_8bat";
 474                         regulator-min-microvolt = <1800000>;
 475                         regulator-max-microvolt = <1800000>;
 476                 };
 477
 478                 ldo1: regulator-ldo1 {
 479                         compatible = "ti,tps65218-ldo1";
 480                         regulator-min-microvolt = <1800000>;
 481                         regulator-max-microvolt = <1800000>;
 482                         regulator-boot-on;
 483                         regulator-always-on;
 484                 };
 485         };
 486
 487         at24@50 {
 488                 compatible = "at24,24c256";
 489                 pagesize = <64>;
 490                 reg = <0x50>;
 491         };
 492
 493         pixcir_ts@5c {
 494                 compatible = "pixcir,pixcir_tangoc";
 495                 pinctrl-names = "default";
 496                 pinctrl-0 = <&pixcir_ts_pins>;
 497                 reg = <0x5c>;
 498                 interrupt-parent = <&gpio1>;
 499                 interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
 500
 501                 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 502
 503                 touchscreen-size-x = <1024>;
 504                 touchscreen-size-y = <600>;
 505         };
 506
 507         tlv320aic3111: tlv320aic3111@18 {
 508                 #sound-dai-cells = <0>;
 509                 compatible = "ti,tlv320aic3111";
 510                 reg = <0x18>;
 511                 status = "okay";
 512
 513                 ai31xx-micbias-vg = <MICBIAS_2_0V>;
 514
 515                 /* Regulators */
 516                 HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
 517                 SPRVDD-supply = <&vbat>; /* vbat */
 518                 SPLVDD-supply = <&vbat>; /* vbat */
 519                 AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
 520                 IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
 521                 DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
 522         };
 523 };
 524
 525 &i2c2 {
 526         pinctrl-names = "default";
 527         pinctrl-0 = <&i2c2_pins>;
 528         status = "okay";
 529 };
 530
 531 &gpio0 {
 532         status = "okay";
 533 };
 534
 535 &gpio1 {
 536         status = "okay";
 537 };
 538
 539 &gpio2 {
 540         pinctrl-names = "default";
 541         pinctrl-0 = <&display_mux_pins>;
 542         status = "okay";
 543
 544         p1 {
 545                 /*
 546                  * SelLCDorHDMI selects between display and audio paths:
 547                  * Low: HDMI display with audio via HDMI
 548                  * High: LCD display with analog audio via aic3111 codec
 549                  */
 550                 gpio-hog;
 551                 gpios = <1 GPIO_ACTIVE_HIGH>;
 552                 output-high;
 553                 line-name = "SelLCDorHDMI";
 554         };
 555 };
 556
 557 &gpio3 {
 558         status = "okay";
 559 };
 560
 561 &elm {
 562         status = "okay";
 563 };
 564
 565 &gpmc {
 566         status = "okay";        /* Disable QSPI when enabling GPMC (NAND) */
 567         pinctrl-names = "default";
 568         pinctrl-0 = <&nand_flash_x8>;
 569         ranges = <0 0 0x08000000 0x01000000>;   /* CS0 space. Min partition = 16MB */
 570         nand@0,0 {
 571                 compatible = "ti,omap2-nand";
 572                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 573                 interrupt-parent = <&gpmc>;
 574                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 575                              <1 IRQ_TYPE_NONE>; /* termcount */
 576                 ti,nand-ecc-opt = "bch16";
 577                 ti,elm-id = <&elm>;
 578                 nand-bus-width = <8>;
 579                 gpmc,device-width = <1>;
 580                 gpmc,sync-clk-ps = <0>;
 581                 gpmc,cs-on-ns = <0>;
 582                 gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
 583                 gpmc,cs-wr-off-ns = <40>;
 584                 gpmc,adv-on-ns = <0>;  /* cs-on-ns */
 585                 gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
 586                 gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
 587                 gpmc,we-on-ns = <0>;   /* cs-on-ns */
 588                 gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
 589                 gpmc,oe-on-ns = <3>;  /* cs-on-ns + tRR + 2 */
 590                 gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
 591                 gpmc,access-ns = <30>; /* tCEA + 4*/
 592                 gpmc,rd-cycle-ns = <40>;
 593                 gpmc,wr-cycle-ns = <40>;
 594                 gpmc,bus-turnaround-ns = <0>;
 595                 gpmc,cycle2cycle-delay-ns = <0>;
 596                 gpmc,clk-activation-ns = <0>;
 597                 gpmc,wr-access-ns = <40>;
 598                 gpmc,wr-data-mux-bus-ns = <0>;
 599                 /* MTD partition table */
 600                 /* All SPL-* partitions are sized to minimal length
 601                  * which can be independently programmable. For
 602                  * NAND flash this is equal to size of erase-block */
 603                 #address-cells = <1>;
 604                 #size-cells = <1>;
 605                 partition@0 {
 606                         label = "NAND.SPL";
 607                         reg = <0x00000000 0x00040000>;
 608                 };
 609                 partition@1 {
 610                         label = "NAND.SPL.backup1";
 611                         reg = <0x00040000 0x00040000>;
 612                 };
 613                 partition@2 {
 614                         label = "NAND.SPL.backup2";
 615                         reg = <0x00080000 0x00040000>;
 616                 };
 617                 partition@3 {
 618                         label = "NAND.SPL.backup3";
 619                         reg = <0x000C0000 0x00040000>;
 620                 };
 621                 partition@4 {
 622                         label = "NAND.u-boot-spl-os";
 623                         reg = <0x00100000 0x00080000>;
 624                 };
 625                 partition@5 {
 626                         label = "NAND.u-boot";
 627                         reg = <0x00180000 0x00100000>;
 628                 };
 629                 partition@6 {
 630                         label = "NAND.u-boot-env";
 631                         reg = <0x00280000 0x00040000>;
 632                 };
 633                 partition@7 {
 634                         label = "NAND.u-boot-env.backup1";
 635                         reg = <0x002C0000 0x00040000>;
 636                 };
 637                 partition@8 {
 638                         label = "NAND.kernel";
 639                         reg = <0x00300000 0x00700000>;
 640                 };
 641                 partition@9 {
 642                         label = "NAND.file-system";
 643                         reg = <0x00a00000 0x1f600000>;
 644                 };
 645         };
 646 };
 647
 648 &epwmss0 {
 649         status = "okay";
 650 };
 651
 652 &tscadc {
 653         status = "okay";
 654
 655         adc {
 656                 ti,adc-channels = <0 1 2 3 4 5 6 7>;
 657         };
 658 };
 659
 660 &ecap0 {
 661                 status = "okay";
 662                 pinctrl-names = "default";
 663                 pinctrl-0 = <&ecap0_pins>;
 664 };
 665
 666 &spi0 {
 667         pinctrl-names = "default";
 668         pinctrl-0 = <&spi0_pins>;
 669         status = "okay";
 670 };
 671
 672 &spi1 {
 673         pinctrl-names = "default";
 674         pinctrl-0 = <&spi1_pins>;
 675         status = "okay";
 676 };
 677
 678 &usb2_phy1 {
 679         status = "okay";
 680 };
 681
 682 &usb1 {
 683         dr_mode = "peripheral";
 684         status = "okay";
 685 };
 686
 687 &usb2_phy2 {
 688         status = "okay";
 689 };
 690
 691 &usb2 {
 692         dr_mode = "host";
 693         status = "okay";
 694 };
 695
 696 &qspi {
 697         status = "disabled";    /* Disable GPMC (NAND) when enabling QSPI */
 698         pinctrl-names = "default";
 699         pinctrl-0 = <&qspi1_default>;
 700
 701         spi-max-frequency = <48000000>;
 702         m25p80@0 {
 703                 compatible = "mx66l51235l";
 704                 spi-max-frequency = <48000000>;
 705                 reg = <0>;
 706                 spi-cpol;
 707                 spi-cpha;
 708                 spi-tx-bus-width = <1>;
 709                 spi-rx-bus-width = <4>;
 710                 #address-cells = <1>;
 711                 #size-cells = <1>;
 712
 713                 /* MTD partition table.
 714                  * The ROM checks the first 512KiB
 715                  * for a valid file to boot(XIP).
 716                  */
 717                 partition@0 {
 718                         label = "QSPI.U_BOOT";
 719                         reg = <0x00000000 0x000080000>;
 720                 };
 721                 partition@1 {
 722                         label = "QSPI.U_BOOT.backup";
 723                         reg = <0x00080000 0x00080000>;
 724                 };
 725                 partition@2 {
 726                         label = "QSPI.U-BOOT-SPL_OS";
 727                         reg = <0x00100000 0x00010000>;
 728                 };
 729                 partition@3 {
 730                         label = "QSPI.U_BOOT_ENV";
 731                         reg = <0x00110000 0x00010000>;
 732                 };
 733                 partition@4 {
 734                         label = "QSPI.U-BOOT-ENV.backup";
 735                         reg = <0x00120000 0x00010000>;
 736                 };
 737                 partition@5 {
 738                         label = "QSPI.KERNEL";
 739                         reg = <0x00130000 0x0800000>;
 740                 };
 741                 partition@6 {
 742                         label = "QSPI.FILESYSTEM";
 743                         reg = <0x00930000 0x36D0000>;
 744                 };
 745         };
 746 };
 747
 748 &hdq {
 749         status = "okay";
 750         pinctrl-names = "default";
 751         pinctrl-0 = <&hdq_pins>;
 752 };
 753
 754 &dss {
 755         status = "ok";
 756
 757         pinctrl-names = "default";
 758         pinctrl-0 = <&dss_pins>;
 759
 760         port {
 761                 dpi_out: endpoint@0 {
 762                         remote-endpoint = <&lcd_in>;
 763                         data-lines = <24>;
 764                 };
 765         };
 766 };
 767
 768 &vpfe1 {
 769         status = "okay";
 770         pinctrl-names = "default", "sleep";
 771         pinctrl-0 = <&vpfe1_pins_default>;
 772         pinctrl-1 = <&vpfe1_pins_sleep>;
 773
 774         port {
 775                 vpfe1_ep: endpoint {
 776                         /* remote-endpoint = <&sensor>; add once we have it */
 777                         ti,am437x-vpfe-interface = <0>;
 778                         bus-width = <8>;
 779                         hsync-active = <0>;
 780                         vsync-active = <0>;
 781                 };
 782         };
 783 };
 784
 785 &mcasp1 {
 786         #sound-dai-cells = <0>;
 787         pinctrl-names = "default", "sleep";
 788         pinctrl-0 = <&mcasp1_pins>;
 789         pinctrl-1 = <&mcasp1_sleep_pins>;
 790
 791         status = "okay";
 792
 793         op-mode = <0>;          /* MCASP_IIS_MODE */
 794         tdm-slots = <2>;
 795         /* 4 serializer */
 796         serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
 797                 1 2 0 0
 798         >;
 799         tx-num-evt = <32>;
 800         rx-num-evt = <32>;
 801 };
 802
 803 &synctimer_32kclk {
 804         assigned-clocks = <&mux_synctimer32k_ck>;
 805         assigned-clock-parents = <&clkdiv32k_ick>;
 806 };