arch/arm/dts/am437x-idk-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include "am4372.dtsi"
  12 #include <dt-bindings/pinctrl/am43xx.h>
  13 #include <dt-bindings/pwm/pwm.h>
  14 #include <dt-bindings/gpio/gpio.h>
  15 #include <dt-bindings/input/input.h>
  16
  17 / {
  18         model = "TI AM437x Industrial Development Kit";
  19         compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43";
  20
  21         chosen {
  22                 stdout-path = &uart0;
  23                 tick-timer = &timer2;
  24         };
  25
  26         v24_0d: fixed-regulator-v24_0d {
  27                 compatible = "regulator-fixed";
  28                 regulator-name = "V24_0D";
  29                 regulator-min-microvolt = <24000000>;
  30                 regulator-max-microvolt = <24000000>;
  31                 regulator-always-on;
  32                 regulator-boot-on;
  33         };
  34
  35         v3_3d: fixed-regulator-v3_3d {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "V3_3D";
  38                 regulator-min-microvolt = <3300000>;
  39                 regulator-max-microvolt = <3300000>;
  40                 regulator-always-on;
  41                 regulator-boot-on;
  42                 vin-supply = <&v24_0d>;
  43         };
  44
  45         vdd_corereg: fixed-regulator-vdd_corereg {
  46                 compatible = "regulator-fixed";
  47                 regulator-name = "VDD_COREREG";
  48                 regulator-min-microvolt = <1100000>;
  49                 regulator-max-microvolt = <1100000>;
  50                 regulator-always-on;
  51                 regulator-boot-on;
  52                 vin-supply = <&v24_0d>;
  53         };
  54
  55         vdd_core: fixed-regulator-vdd_core {
  56                 compatible = "regulator-fixed";
  57                 regulator-name = "VDD_CORE";
  58                 regulator-min-microvolt = <1100000>;
  59                 regulator-max-microvolt = <1100000>;
  60                 regulator-always-on;
  61                 regulator-boot-on;
  62                 vin-supply = <&vdd_corereg>;
  63         };
  64
  65         v1_8dreg: fixed-regulator-v1_8dreg{
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "V1_8DREG";
  68                 regulator-min-microvolt = <1800000>;
  69                 regulator-max-microvolt = <1800000>;
  70                 regulator-always-on;
  71                 regulator-boot-on;
  72                 vin-supply = <&v24_0d>;
  73         };
  74
  75         v1_8d: fixed-regulator-v1_8d{
  76                 compatible = "regulator-fixed";
  77                 regulator-name = "V1_8D";
  78                 regulator-min-microvolt = <1800000>;
  79                 regulator-max-microvolt = <1800000>;
  80                 regulator-always-on;
  81                 regulator-boot-on;
  82                 vin-supply = <&v1_8dreg>;
  83         };
  84
  85         v1_5dreg: fixed-regulator-v1_5dreg{
  86                 compatible = "regulator-fixed";
  87                 regulator-name = "V1_5DREG";
  88                 regulator-min-microvolt = <1500000>;
  89                 regulator-max-microvolt = <1500000>;
  90                 regulator-always-on;
  91                 regulator-boot-on;
  92                 vin-supply = <&v24_0d>;
  93         };
  94
  95         v1_5d: fixed-regulator-v1_5d{
  96                 compatible = "regulator-fixed";
  97                 regulator-name = "V1_5D";
  98                 regulator-min-microvolt = <1500000>;
  99                 regulator-max-microvolt = <1500000>;
 100                 regulator-always-on;
 101                 regulator-boot-on;
 102                 vin-supply = <&v1_5dreg>;
 103         };
 104
 105         gpio_keys: gpio_keys {
 106                 compatible = "gpio-keys";
 107                 pinctrl-names = "default";
 108                 pinctrl-0 = <&gpio_keys_pins_default>;
 109
 110                 switch@0 {
 111                         label = "power-button";
 112                         linux,code = <KEY_POWER>;
 113                         gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 114                 };
 115         };
 116
 117         /* fixed 32k external oscillator clock */
 118         clk_32k_rtc: clk_32k_rtc {
 119                 #clock-cells = <0>;
 120                 compatible = "fixed-clock";
 121                 clock-frequency = <32768>;
 122         };
 123 };
 124
 125 &am43xx_pinmux {
 126         gpio_keys_pins_default: gpio_keys_pins_default {
 127                 pinctrl-single,pins = <
 128                         AM4372_IOPAD(0x9b8, PIN_INPUT | MUX_MODE7)      /* cam0_field.gpio4_2 */
 129                 >;
 130         };
 131
 132         i2c0_pins_default: i2c0_pins_default {
 133                 pinctrl-single,pins = <
 134                         AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
 135                         AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
 136                 >;
 137         };
 138
 139         i2c0_pins_sleep: i2c0_pins_sleep {
 140                 pinctrl-single,pins = <
 141                         AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN | MUX_MODE7)
 142                         AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 143                 >;
 144         };
 145
 146         i2c2_pins_default: i2c2_pins_default {
 147                 pinctrl-single,pins = <
 148                         AM4372_IOPAD(0x9e8, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */
 149                         AM4372_IOPAD(0x9ec, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */
 150                 >;
 151         };
 152
 153         i2c2_pins_sleep: i2c2_pins_sleep {
 154                 pinctrl-single,pins = <
 155                         AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 156                         AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN | MUX_MODE7)
 157                 >;
 158         };
 159
 160         mmc1_pins_default: pinmux_mmc1_pins_default {
 161                 pinctrl-single,pins = <
 162                         AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
 163                         AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
 164                         AM4372_IOPAD(0x9f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
 165                         AM4372_IOPAD(0x9f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
 166                         AM4372_IOPAD(0x9f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
 167                         AM4372_IOPAD(0x9fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
 168                         AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 169                 >;
 170         };
 171
 172         mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
 173                 pinctrl-single,pins = <
 174                         AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN | MUX_MODE7)
 175                         AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN | MUX_MODE7)
 176                         AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN | MUX_MODE7)
 177                         AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN | MUX_MODE7)
 178                         AM4372_IOPAD(0x9f8, PIN_INPUT_PULLDOWN | MUX_MODE7)
 179                         AM4372_IOPAD(0x9fc, PIN_INPUT_PULLDOWN | MUX_MODE7)
 180                         AM4372_IOPAD(0x960, PIN_INPUT_PULLDOWN | MUX_MODE7)
 181                 >;
 182         };
 183
 184         ecap0_pins_default: backlight_pins_default {
 185                 pinctrl-single,pins = <
 186                         AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* ecap0_in_pwm0_out.ecap0_in_pwm0_out */
 187                 >;
 188         };
 189
 190         cpsw_default: cpsw_default {
 191                 pinctrl-single,pins = <
 192                         AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txclk.rgmii1_tclk */
 193                         AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txen.rgmii1_tctl */
 194                         AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td0 */
 195                         AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td1 */
 196                         AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd0.rgmii1_td2 */
 197                         AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)    /* mii1_txd1.rgmii1_td3 */
 198                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxclk.rmii1_rclk */
 199                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxdv.rgmii1_rctl */
 200                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd0 */
 201                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd1 */
 202                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd0.rgmii1_rd2 */
 203                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)     /* mii1_rxd1.rgmii1_rd3 */
 204                 >;
 205         };
 206
 207         cpsw_sleep: cpsw_sleep {
 208                 pinctrl-single,pins = <
 209                         AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 210                         AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
 211                         AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
 212                         AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
 213                         AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
 214                         AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 215                         AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
 216                         AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
 217                         AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
 218                         AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 219                         AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
 220                         AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
 221                 >;
 222         };
 223
 224         davinci_mdio_default: davinci_mdio_default {
 225                 pinctrl-single,pins = <
 226                         /* MDIO */
 227                         AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
 228                         AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
 229                 >;
 230         };
 231
 232         davinci_mdio_sleep: davinci_mdio_sleep {
 233                 pinctrl-single,pins = <
 234                         /* MDIO reset value */
 235                         AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
 236                         AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 237                 >;
 238         };
 239
 240         qspi_pins_default: qspi_pins_default {
 241                 pinctrl-single,pins = <
 242                         AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE3)      /* gpmc_csn0.qspi_csn */
 243                         AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2)             /* gpmc_csn3.qspi_clk */
 244                         AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_advn_ale.qspi_d0 */
 245                         AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_oen_ren.qspi_d1 */
 246                         AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_wen.qspi_d2 */
 247                         AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)       /* gpmc_be0n_cle.qspi_d3 */
 248                 >;
 249         };
 250
 251         qspi_pins_sleep: qspi_pins_sleep{
 252                 pinctrl-single,pins = <
 253                         AM4372_IOPAD(0x87c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 254                         AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7)
 255                         AM4372_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)
 256                         AM4372_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)
 257                         AM4372_IOPAD(0x898, PIN_INPUT_PULLDOWN | MUX_MODE7)
 258                         AM4372_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)
 259                 >;
 260         };
 261 };
 262
 263 &i2c0 {
 264         status = "okay";
 265         pinctrl-names = "default", "sleep";
 266         pinctrl-0 = <&i2c0_pins_default>;
 267         pinctrl-1 = <&i2c0_pins_sleep>;
 268         clock-frequency = <400000>;
 269
 270         at24@50 {
 271                 compatible = "at24,24c256";
 272                 pagesize = <64>;
 273                 reg = <0x50>;
 274         };
 275
 276         tps: tps62362@60 {
 277                 compatible = "ti,tps62362";
 278                 reg = <0x60>;
 279                 regulator-name = "VDD_MPU";
 280                 regulator-min-microvolt = <950000>;
 281                 regulator-max-microvolt = <1330000>;
 282                 regulator-boot-on;
 283                 regulator-always-on;
 284                 ti,vsel0-state-high;
 285                 ti,vsel1-state-high;
 286                 vin-supply = <&v3_3d>;
 287         };
 288 };
 289
 290 &i2c2 {
 291         status = "okay";
 292         pinctrl-names = "default", "sleep";
 293         pinctrl-0 = <&i2c2_pins_default>;
 294         pinctrl-1 = <&i2c2_pins_sleep>;
 295         clock-frequency = <100000>;
 296 };
 297
 298 &epwmss0 {
 299         status = "okay";
 300 };
 301
 302 &ecap0 {
 303         status = "okay";
 304         pinctrl-names = "default";
 305         pinctrl-0 = <&ecap0_pins_default>;
 306 };
 307
 308 &gpio0 {
 309         status = "okay";
 310 };
 311
 312 &gpio1 {
 313         status = "okay";
 314 };
 315
 316 &gpio4 {
 317         status = "okay";
 318 };
 319
 320 &gpio5 {
 321         status = "okay";
 322 };
 323
 324 &mmc1 {
 325         status = "okay";
 326         pinctrl-names = "default", "sleep";
 327         pinctrl-0 = <&mmc1_pins_default>;
 328         pinctrl-1 = <&mmc1_pins_sleep>;
 329         vmmc-supply = <&v3_3d>;
 330         bus-width = <4>;
 331         cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 332 };
 333
 334 &qspi {
 335         status = "okay";
 336         pinctrl-names = "default", "sleep";
 337         pinctrl-0 = <&qspi_pins_default>;
 338         pinctrl-1 = <&qspi_pins_sleep>;
 339
 340         spi-max-frequency = <48000000>;
 341         m25p80@0 {
 342                 compatible = "mx66l51235l", "jedec,spi-nor";
 343                 spi-max-frequency = <48000000>;
 344                 reg = <0>;
 345                 spi-cpol;
 346                 spi-cpha;
 347                 spi-tx-bus-width = <1>;
 348                 spi-rx-bus-width = <4>;
 349                 #address-cells = <1>;
 350                 #size-cells = <1>;
 351
 352                 /*
 353                  * MTD partition table.  The ROM checks the first 512KiB for a
 354                  * valid file to boot(XIP).
 355                  */
 356                 partition@0 {
 357                         label = "QSPI.U_BOOT";
 358                         reg = <0x00000000 0x000080000>;
 359                 };
 360                 partition@1 {
 361                         label = "QSPI.U_BOOT.backup";
 362                         reg = <0x00080000 0x00080000>;
 363                 };
 364                 partition@2 {
 365                         label = "QSPI.U-BOOT-SPL_OS";
 366                         reg = <0x00100000 0x00010000>;
 367                 };
 368                 partition@3 {
 369                         label = "QSPI.U_BOOT_ENV";
 370                         reg = <0x00110000 0x00010000>;
 371                 };
 372                 partition@4 {
 373                         label = "QSPI.U-BOOT-ENV.backup";
 374                         reg = <0x00120000 0x00010000>;
 375                 };
 376                 partition@5 {
 377                         label = "QSPI.KERNEL";
 378                         reg = <0x00130000 0x0800000>;
 379                 };
 380                 partition@6 {
 381                         label = "QSPI.FILESYSTEM";
 382                         reg = <0x00930000 0x36D0000>;
 383                 };
 384         };
 385 };
 386
 387 &mac {
 388         slaves = <1>;
 389         pinctrl-names = "default", "sleep";
 390         pinctrl-0 = <&cpsw_default>;
 391         pinctrl-1 = <&cpsw_sleep>;
 392         status = "okay";
 393 };
 394
 395 &davinci_mdio {
 396         pinctrl-names = "default", "sleep";
 397         pinctrl-0 = <&davinci_mdio_default>;
 398         pinctrl-1 = <&davinci_mdio_sleep>;
 399         status = "okay";
 400
 401         ethphy0: ethernet-phy@0 {
 402                 reg = <0>;
 403         };
 404 };
 405
 406 &cpsw_emac0 {
 407         phy-handle = <&ethphy0>;
 408         phy-mode = "rgmii";
 409 };
 410
 411 &rtc {
 412         clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
 413         clock-names = "ext-clk", "int-clk";
 414         status = "okay";
 415 };
 416
 417 &wdt {
 418         status = "okay";
 419 };
 420
 421 &cpu {
 422         cpu0-supply = <&tps>;
 423 };