1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 B&R Industrial Automation GmbH
4 * http://www.br-automation.com
12 model = "BRPPT1 (NAND) Panel";
13 compatible = "ti,am33xx";
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
18 order-no = "6PPT30 (NAND)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
27 ds1bkl0 = &pwmbacklight;
37 bootargs = "console=ttyO0,115200 earlyprintk";
42 device_type = "memory";
43 reg = <0x80000000 0x10000000>; /* 256 MB */
49 compatible = "ti,tilcdc,panel";
50 enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
52 backlight = <&pwmbacklight>;
53 bkl-pwm = <&pwmbacklight>;
71 native-mode = <&timing0>;
73 clock-frequency = <32000000>;
90 vmmcsd_fixed: fixedregulator@0 {
91 compatible = "regulator-fixed";
92 regulator-name = "vmmcsd_fixed";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
97 pwm0: omap-pwm@timer5 {
98 compatible = "ti,omap-dmtimer-pwm";
99 ti,timers = <&timer5>;
103 pwm1: omap-pwm@timer6 {
104 compatible = "ti,omap-dmtimer-pwm";
105 ti,timers = <&timer6>;
110 compatible = "pwm-beeper";
111 pwms = <&pwm0 0 0 0>;
114 pwmbacklight: pwm-bkl {
115 compatible = "pwm-backlight";
116 pwms = <&pwm1 0 5000000 0>;
118 default-brightness-level = <255>;
119 brightness-levels = <0 16 32 64 128 170 202 234 255>;
121 power-supply = <&vmmcsd_fixed>;
122 enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
126 &uart0 { /* console uart */
138 clock-frequency = <400000>;
140 tps: tps@24 { /* PMIC controller */
143 compatible = "ti,tps65217";
146 compatible = "ti,tps65217-bl";
147 isel = <1>; /* 1 - ISET1, 2 ISET2 */
148 fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */
149 default-brightness = <50>;
156 clock-frequency = <100000>;
196 phy0: ethernet-phy@0 {
200 phy1: ethernet-phy@1 {
211 phy-handle = <&phy0>;
212 dual_emac_res_vlan = <1>;
217 phy-handle = <&phy1>;
218 dual_emac_res_vlan = <2>;
223 vmmc-supply = <&vmmcsd_fixed>;
226 ti,needs-special-hs-handling;
227 ti,vcc-aux-disable-is-sleep;
276 ti,x-plate-resistance = <200>;
277 ti,zx-cutoff-ratio = <40>;
278 ti,min_deviation = <60>;
279 ti,max_deviation = <600>;
280 ti,coordinate-readouts = <5>;
281 ti,wire-config = <0x00 0x11 0x22 0x33>;
289 ti,adc-channels = <5 6 7>;
296 pinctrl-names = "default";
297 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
299 compatible = "ti,omap2-nand";
300 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
301 interrupt-parent = <&gpmc>;
302 rb-gpios = <&gpmc 1 GPIO_ACTIVE_HIGH>; /* gpmc_wait1 */
303 ti,nand-ecc-opt = "bch8";
305 nand-bus-width = <8>;
306 gpmc,device-width = <1>;
307 gpmc,sync-clk-ps = <0>;
309 gpmc,cs-rd-off-ns = <44>;
310 gpmc,cs-wr-off-ns = <44>;
311 gpmc,adv-on-ns = <6>;
312 gpmc,adv-rd-off-ns = <34>;
313 gpmc,adv-wr-off-ns = <44>;
315 gpmc,we-off-ns = <40>;
317 gpmc,oe-off-ns = <54>;
318 gpmc,access-ns = <64>;
319 gpmc,rd-cycle-ns = <82>;
320 gpmc,wr-cycle-ns = <82>;
321 gpmc,wait-on-read = "true";
322 gpmc,wait-on-write = "true";
323 gpmc,bus-turnaround-ns = <0>;
324 gpmc,cycle2cycle-delay-ns = <0>;
325 gpmc,clk-activation-ns = <0>;
326 gpmc,wait-monitoring-ns = <0>;
327 gpmc,wr-access-ns = <40>;
328 gpmc,wr-data-mux-bus-ns = <0>;
330 #address-cells = <1>;
334 reg = <0x00000000 0x000020000>;
337 label = "NAND.cfgscr";
338 reg = <0x00020000 0x00020000>;
342 reg = <0x00040000 0x00020000>;
345 label = "NAND.u-boot-env";
346 reg = <0x00060000 0x00020000>;
349 label = "NAND.u-boot";
350 reg = <0x00080000 0x00080000>;
353 label = "NAND.kernel";
354 reg = <0x00100000 0x00400000>;
357 label = "NAND.rootfs";
358 reg = <0x00500000 0x08000000>;
362 reg = <0x08500000 0x17b00000>;