3 * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT)
27 # if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X)
29 #include <asm/arch/pxa-regs.h>
33 int usb_cpu_init(void)
35 #if defined(CONFIG_CPU_MONAHANS)
36 /* Enable USB host clock. */
37 writel(readl(CKENA) | CKENA_2_USBHOST | CKENA_20_UDC, CKENA);
40 #if defined(CONFIG_CPU_PXA27X)
41 /* Enable USB host clock. */
42 writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
45 #if defined(CONFIG_CPU_MONAHANS)
46 /* Configure Port 2 for Host (USB Client Registers) */
47 writel(0x3000c, UP2OCR);
50 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
52 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
54 writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
55 while (readl(UHCHR) & UHCHR_FSBIR)
58 #if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
59 writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
61 #if defined(CONFIG_CPU_PXA27X)
62 writel(readl(UHCHR) & ~UHCHR_SSEP2, UHCHR);
64 writel(readl(UHCHR) & ~(UHCHR_SSEP1 | UHCHR_SSE), UHCHR);
69 int usb_cpu_stop(void)
71 writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
73 writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
75 writel(readl(UHCCOMS) | UHCCOMS_HCR, UHCCOMS);
78 #if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
79 writel(readl(UHCHR) | UHCHR_SSEP0, UHCHR);
81 #if defined(CONFIG_CPU_PXA27X)
82 writel(readl(UHCHR) | UHCHR_SSEP2, UHCHR);
84 writel(readl(UHCHR) | UHCHR_SSEP1 | UHCHR_SSE, UHCHR);
86 #if defined(CONFIG_CPU_MONAHANS)
87 /* Disable USB host clock. */
88 writel(readl(CKENA) & ~(CKENA_2_USBHOST | CKENA_20_UDC), CKENA);
91 #if defined(CONFIG_CPU_PXA27X)
92 /* Disable USB host clock. */
93 writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
99 int usb_cpu_init_fail(void)
101 return usb_cpu_stop();
104 # endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_CPU_PXA27X) */
105 #endif /* defined(CONFIG_USB_OHCI) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */