2 * (C) Copyright 2014 - 2015 Xilinx, Inc.
3 * Michal Simek <michal.simek@xilinx.com>
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/hardware.h>
10 #include <asm/arch/sys_proto.h>
11 #include <asm/armv8/mmu.h>
14 #define ZYNQ_SILICON_VER_MASK 0xF000
15 #define ZYNQ_SILICON_VER_SHIFT 12
17 DECLARE_GLOBAL_DATA_PTR;
19 static struct mm_region zynqmp_mem_map[] = {
23 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
28 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
30 PTE_BLOCK_PXN | PTE_BLOCK_UXN
34 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
36 PTE_BLOCK_PXN | PTE_BLOCK_UXN
40 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
43 .base = 0x400000000UL,
44 .size = 0x200000000UL,
45 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
47 PTE_BLOCK_PXN | PTE_BLOCK_UXN
49 .base = 0x600000000UL,
50 .size = 0x800000000UL,
51 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
54 .base = 0xe00000000UL,
55 .size = 0xf200000000UL,
56 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
58 PTE_BLOCK_PXN | PTE_BLOCK_UXN
64 struct mm_region *mem_map = zynqmp_mem_map;
66 u64 get_page_table_size(void)
71 static unsigned int zynqmp_get_silicon_version_secure(void)
75 ver = readl(&csu_base->version);
76 ver &= ZYNQMP_SILICON_VER_MASK;
77 ver >>= ZYNQMP_SILICON_VER_SHIFT;
82 unsigned int zynqmp_get_silicon_version(void)
84 if (current_el() == 3)
85 return zynqmp_get_silicon_version_secure();
87 gd->cpu_clk = get_tbclk();
89 switch (gd->cpu_clk) {
91 return ZYNQMP_CSU_VERSION_VELOCE;
93 return ZYNQMP_CSU_VERSION_QEMU;
95 return ZYNQMP_CSU_VERSION_EP108;
98 return ZYNQMP_CSU_VERSION_SILICON;