3 * David Feng <fenghua@phytium.com.cn>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm-offsets.h>
11 #include <linux/linkage.h>
12 #include <asm/macro.h>
14 ENTRY(armv8_switch_to_el2)
15 switch_el x0, 1f, 0f, 0f
18 mov x0, #0x5b1 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */
20 msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */
22 msr cptr_el2, x0 /* Disable coprocessor traps to EL2 */
24 /* Initialize SCTLR_EL2 */
27 /* Return to the EL2_SP2 mode from EL3 */
29 msr sp_el2, x0 /* Migrate SP */
31 msr vbar_el2, x0 /* Migrate VBAR */
33 msr spsr_el3, x0 /* EL2_SP2 | D | A | I | F */
36 ENDPROC(armv8_switch_to_el2)
38 ENTRY(armv8_switch_to_el1)
39 switch_el x0, 0f, 1f, 0f
42 /* Initialize Generic Timers */
44 orr x0, x0, #0x3 /* Enable EL1 access to timers */
48 orr x0, x0, #0x3 /* Enable EL0 access to timers */
51 /* Initilize MPID/MPIDR registers */
57 /* Disable coprocessor traps */
59 msr cptr_el2, x0 /* Disable coprocessor traps to EL2 */
60 msr hstr_el2, xzr /* Disable coprocessor traps to EL2 */
62 msr cpacr_el1, x0 /* Enable FP/SIMD at EL1 */
64 /* Initialize HCR_EL2 */
65 mov x0, #(1 << 31) /* 64bit EL1 */
66 orr x0, x0, #(1 << 29) /* Disable HVC */
69 /* SCTLR_EL1 initialization */
71 movk x0, #0x30d0, lsl #16
74 /* Return to the EL1_SP1 mode from EL2 */
76 msr sp_el1, x0 /* Migrate SP */
78 msr vbar_el1, x0 /* Migrate VBAR */
80 msr spsr_el2, x0 /* EL1_SP1 | D | A | I | F */
83 ENDPROC(armv8_switch_to_el1)