1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2016 Freescale Semiconductor, Inc.
4 * Author: Hongbo Zhang <hongbo.zhang@nxp.com>
5 * This file implements LS102X platform PSCI SYSTEM-SUSPEND function
9 #include <linux/linkage.h>
12 /* Default PSCI function, return -1, Not Implemented */
13 #define PSCI_DEFAULT(__fn) \
15 mov w0, #ARM_PSCI_RET_NI; \
20 /* PSCI function and ID table definition*/
21 #define PSCI_TABLE(__id, __fn) \
25 .pushsection ._secure.text, "ax"
27 /* 32 bits PSCI default functions */
28 PSCI_DEFAULT(psci_version)
29 PSCI_DEFAULT(psci_cpu_suspend)
30 PSCI_DEFAULT(psci_cpu_off)
31 PSCI_DEFAULT(psci_cpu_on)
32 PSCI_DEFAULT(psci_affinity_info)
33 PSCI_DEFAULT(psci_migrate)
34 PSCI_DEFAULT(psci_migrate_info_type)
35 PSCI_DEFAULT(psci_migrate_info_up_cpu)
36 PSCI_DEFAULT(psci_system_off)
37 PSCI_DEFAULT(psci_system_reset)
38 PSCI_DEFAULT(psci_features)
39 PSCI_DEFAULT(psci_cpu_freeze)
40 PSCI_DEFAULT(psci_cpu_default_suspend)
41 PSCI_DEFAULT(psci_node_hw_state)
42 PSCI_DEFAULT(psci_system_suspend)
43 PSCI_DEFAULT(psci_set_suspend_mode)
44 PSCI_DEFAULT(psi_stat_residency)
45 PSCI_DEFAULT(psci_stat_count)
49 PSCI_TABLE(ARM_PSCI_FN_CPU_SUSPEND, psci_cpu_suspend)
50 PSCI_TABLE(ARM_PSCI_FN_CPU_OFF, psci_cpu_off)
51 PSCI_TABLE(ARM_PSCI_FN_CPU_ON, psci_cpu_on)
52 PSCI_TABLE(ARM_PSCI_FN_MIGRATE, psci_migrate)
53 PSCI_TABLE(ARM_PSCI_0_2_FN_PSCI_VERSION, psci_version)
54 PSCI_TABLE(ARM_PSCI_0_2_FN_CPU_SUSPEND, psci_cpu_suspend)
55 PSCI_TABLE(ARM_PSCI_0_2_FN_CPU_OFF, psci_cpu_off)
56 PSCI_TABLE(ARM_PSCI_0_2_FN_CPU_ON, psci_cpu_on)
57 PSCI_TABLE(ARM_PSCI_0_2_FN_AFFINITY_INFO, psci_affinity_info)
58 PSCI_TABLE(ARM_PSCI_0_2_FN_MIGRATE, psci_migrate)
59 PSCI_TABLE(ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE, psci_migrate_info_type)
60 PSCI_TABLE(ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU, psci_migrate_info_up_cpu)
61 PSCI_TABLE(ARM_PSCI_0_2_FN_SYSTEM_OFF, psci_system_off)
62 PSCI_TABLE(ARM_PSCI_0_2_FN_SYSTEM_RESET, psci_system_reset)
63 PSCI_TABLE(ARM_PSCI_1_0_FN_PSCI_FEATURES, psci_features)
64 PSCI_TABLE(ARM_PSCI_1_0_FN_CPU_FREEZE, psci_cpu_freeze)
65 PSCI_TABLE(ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND, psci_cpu_default_suspend)
66 PSCI_TABLE(ARM_PSCI_1_0_FN_NODE_HW_STATE, psci_node_hw_state)
67 PSCI_TABLE(ARM_PSCI_1_0_FN_SYSTEM_SUSPEND, psci_system_suspend)
68 PSCI_TABLE(ARM_PSCI_1_0_FN_SET_SUSPEND_MODE, psci_set_suspend_mode)
69 PSCI_TABLE(ARM_PSCI_1_0_FN_STAT_RESIDENCY, psi_stat_residency)
70 PSCI_TABLE(ARM_PSCI_1_0_FN_STAT_COUNT, psci_stat_count)
73 /* 64 bits PSCI default functions */
74 PSCI_DEFAULT(psci_cpu_suspend_64)
75 PSCI_DEFAULT(psci_cpu_on_64)
76 PSCI_DEFAULT(psci_affinity_info_64)
77 PSCI_DEFAULT(psci_migrate_64)
78 PSCI_DEFAULT(psci_migrate_info_up_cpu_64)
79 PSCI_DEFAULT(psci_cpu_default_suspend_64)
80 PSCI_DEFAULT(psci_node_hw_state_64)
81 PSCI_DEFAULT(psci_system_suspend_64)
82 PSCI_DEFAULT(psci_stat_residency_64)
83 PSCI_DEFAULT(psci_stat_count_64)
87 PSCI_TABLE(ARM_PSCI_0_2_FN64_CPU_SUSPEND, psci_cpu_suspend_64)
88 PSCI_TABLE(ARM_PSCI_0_2_FN64_CPU_ON, psci_cpu_on_64)
89 PSCI_TABLE(ARM_PSCI_0_2_FN64_AFFINITY_INFO, psci_affinity_info_64)
90 PSCI_TABLE(ARM_PSCI_0_2_FN64_MIGRATE, psci_migrate_64)
91 PSCI_TABLE(ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU, psci_migrate_info_up_cpu_64)
92 PSCI_TABLE(ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND, psci_cpu_default_suspend_64)
93 PSCI_TABLE(ARM_PSCI_1_0_FN64_NODE_HW_STATE, psci_node_hw_state_64)
94 PSCI_TABLE(ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND, psci_system_suspend_64)
95 PSCI_TABLE(ARM_PSCI_1_0_FN64_STAT_RESIDENCY, psci_stat_residency_64)
96 PSCI_TABLE(ARM_PSCI_1_0_FN64_STAT_COUNT, psci_stat_count_64)
100 /* PSCI call is Fast Call(atomic), so mask DAIF */
102 stp x15, xzr, [sp, #-16]!
105 /* SMC convention, x18 ~ x30 should be saved by callee */
106 stp x29, x30, [sp, #-16]!
107 stp x27, x28, [sp, #-16]!
108 stp x25, x26, [sp, #-16]!
109 stp x23, x24, [sp, #-16]!
110 stp x21, x22, [sp, #-16]!
111 stp x19, x20, [sp, #-16]!
113 stp x18, x15, [sp, #-16]!
117 /* restore registers */
118 ldp x18, x15, [sp], #16
120 ldp x19, x20, [sp], #16
121 ldp x21, x22, [sp], #16
122 ldp x23, x24, [sp], #16
123 ldp x25, x26, [sp], #16
124 ldp x27, x28, [sp], #16
125 ldp x29, x30, [sp], #16
127 ldp x15, xzr, [sp], #16
132 /* Caller must put PSCI function-ID table base in x9 */
135 1: ldr x10, [x9] /* Load PSCI function table */
136 ubfx x11, x10, #32, #32
137 ubfx x10, x10, #0, #32
138 cbz x10, 3f /* If reach the end, bail out */
140 b.eq 2f /* PSCI function found */
141 add x9, x9, #8 /* If not match, try next entry */
144 2: blr x11 /* Call PSCI function */
147 3: mov x0, #ARM_PSCI_RET_NI
155 /* SMC function ID 0x84000000-0x8400001F: 32 bits PSCI */
163 adr x9, _psci_32_table
167 /* check SMC32 or SMC64 calls */
171 /* SMC function ID 0xC4000000-0xC400001F: 64 bits PSCI */
179 adr x9, _psci_64_table
183 * Get CPU ID from MPIDR, suppose every cluster has same number of CPU cores,
184 * Platform with asymmetric clusters should implement their own interface.
185 * In case this function being called by other platform's C code, the ARM
186 * Architecture Procedure Call Standard is considered, e.g. register X0 is
187 * used for the return value, while in this PSCI environment, X0 usually holds
188 * the SMC function identifier, so X0 should be saved by caller function.
190 ENTRY(psci_get_cpu_id)
191 #ifdef CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER
194 ldr x10, =CONFIG_ARMV8_PSCI_CPUS_PER_CLUSTER
200 ubfx x10, x10, #0, #8
203 ENDPROC(psci_get_cpu_id)
204 .weak psci_get_cpu_id
206 /* CPU ID input in x0, stack top output in x0*/
207 LENTRY(psci_get_cpu_stack_top)
208 adr x9, __secure_stack_end
209 lsl x0, x0, #ARM_PSCI_STACK_SHIFT
212 ENDPROC(psci_get_cpu_stack_top)
215 b unhandled_exception /* simply dead loop */
222 bl psci_get_cpu_stack_top
237 b unhandled_exception
240 .globl el3_exception_vectors
241 el3_exception_vectors:
242 b unhandled_exception /* Sync, Current EL using SP0 */
244 b unhandled_exception /* IRQ, Current EL using SP0 */
246 b unhandled_exception /* FIQ, Current EL using SP0 */
248 b unhandled_exception /* SError, Current EL using SP0 */
250 b unhandled_exception /* Sync, Current EL using SPx */
252 b unhandled_exception /* IRQ, Current EL using SPx */
254 b unhandled_exception /* FIQ, Current EL using SPx */
256 b unhandled_exception /* SError, Current EL using SPx */
258 b handle_sync /* Sync, Lower EL using AArch64 */
260 b unhandled_exception /* IRQ, Lower EL using AArch64 */
262 b unhandled_exception /* FIQ, Lower EL using AArch64 */
264 b unhandled_exception /* SError, Lower EL using AArch64 */
266 b unhandled_exception /* Sync, Lower EL using AArch32 */
268 b unhandled_exception /* IRQ, Lower EL using AArch32 */
270 b unhandled_exception /* FIQ, Lower EL using AArch32 */
272 b unhandled_exception /* SError, Lower EL using AArch32 */
274 ENTRY(psci_setup_vectors)
275 adr x0, el3_exception_vectors
278 ENDPROC(psci_setup_vectors)
280 ENTRY(psci_arch_init)
282 ENDPROC(psci_arch_init)