2 * (C) Copyright 2014 Freescale Semiconductor
4 * SPDX-License-Identifier: GPL-2.0+
6 * Extracted from armv8/start.S
10 #include <linux/linkage.h>
11 #include <asm/macro.h>
14 mov x29, lr /* Save LR */
16 /* Set the SMMU page size in the sACR register */
19 orr w0, w0, #1 << 16 /* set sACR.pagesize to indicate 64K page */
22 /* Initialize GIC Secure Bank Status */
23 #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
24 branch_if_slave x0, 1f
30 bl gic_init_secure_percpu
31 #elif defined(CONFIG_GICV2)
34 bl gic_init_secure_percpu
38 branch_if_master x0, x1, 1f
41 * Slave should wait for master clearing spin table.
42 * This sync prevent salves observing incorrect
43 * value of spin table and jumping to wrong place.
45 #if defined(CONFIG_GICV2) || defined(CONFIG_GICV3)
49 bl gic_wait_for_interrupt
53 * All processors will enter EL2 and optionally EL1.
55 bl armv8_switch_to_el2
56 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1
57 bl armv8_switch_to_el1
63 mov lr, x29 /* Restore LR */
65 ENDPROC(lowlevel_init)