1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2015 Freescale Semiconductor, Inc.
7 #include <efi_loader.h>
8 #include <linux/libfdt.h>
9 #include <fdt_support.h>
11 #ifdef CONFIG_FSL_LSCH3
12 #include <asm/arch/fdt.h>
14 #ifdef CONFIG_FSL_ESDHC
15 #include <fsl_esdhc.h>
17 #ifdef CONFIG_SYS_DPAA_FMAN
21 #include <asm/arch/mp.h>
24 #include <asm/arch-fsl-layerscape/soc.h>
25 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
26 #include <asm/armv8/sec_firmware.h>
28 #include <asm/arch/speed.h>
29 #include <fsl_qbman.h>
31 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
33 return fdt_setprop_string(blob, offset, "phy-connection-type",
34 phy_string_for_interface(phyc));
38 void ft_fixup_cpu(void *blob)
41 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
45 size_t *boot_code_size = &(__secondary_boot_code_size);
46 u32 mask = cpu_pos_mask();
49 off = fdt_path_offset(blob, "/cpus");
51 puts("couldn't find /cpus node\n");
55 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
57 off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
59 while (off != -FDT_ERR_NOTFOUND) {
60 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
62 core_id = fdt_read_number(reg, addr_cells);
63 if (!test_bit(id_to_core(core_id), &mask)) {
64 fdt_del_node(blob, off);
69 off = fdt_node_offset_by_prop_value(blob, off_prev,
70 "device_type", "cpu", 4);
73 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
74 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
78 /* Check the psci version to determine if the psci is supported */
79 psci_ver = sec_firmware_support_psci_version();
80 if (psci_ver == 0xffffffff) {
81 /* remove psci DT node */
82 node = fdt_path_offset(blob, "/psci");
84 goto remove_psci_node;
86 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
88 goto remove_psci_node;
90 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
92 goto remove_psci_node;
94 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
96 goto remove_psci_node;
100 fdt_del_node(blob, node);
105 off = fdt_path_offset(blob, "/cpus");
107 puts("couldn't find /cpus node\n");
110 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
112 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
113 while (off != -FDT_ERR_NOTFOUND) {
114 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
116 core_id = fdt_read_number(reg, addr_cells);
117 if (core_id == 0 || (is_core_online(core_id))) {
119 val += id_to_core(core_id) *
120 SPIN_TABLE_ELEM_SIZE;
121 val = cpu_to_fdt64(val);
122 fdt_setprop_string(blob, off, "enable-method",
124 fdt_setprop(blob, off, "cpu-release-addr",
127 debug("skipping offline core\n");
130 puts("Warning: found cpu node without reg property\n");
132 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
136 fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
138 #if CONFIG_IS_ENABLED(EFI_LOADER)
139 efi_add_memory_map((uintptr_t)&secondary_boot_code,
140 ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
141 EFI_RESERVED_MEMORY_TYPE, false);
146 void fsl_fdt_disable_usb(void *blob)
150 * SYSCLK is used as a reference clock for USB. When the USB
151 * controller is used, SYSCLK must meet the additional requirement
154 if (CONFIG_SYS_CLK_FREQ != 100000000) {
155 off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
156 while (off != -FDT_ERR_NOTFOUND) {
157 fdt_status_disabled(blob, off);
158 off = fdt_node_offset_by_compatible(blob, off,
164 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
165 static void fdt_fixup_gic(void *blob)
169 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
171 struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
174 val = gur_in32(&gur->svr);
176 if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
178 } else if (SVR_REV(val) != REV1_0) {
179 val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
184 offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
186 printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
187 "interrupt-controller@1400000", fdt_strerror(offset));
191 /* Fixup gic node align with 64K */
193 reg[0] = cpu_to_fdt64(GICD_BASE_64K);
194 reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
195 reg[2] = cpu_to_fdt64(GICC_BASE_64K);
196 reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
197 reg[4] = cpu_to_fdt64(GICH_BASE_64K);
198 reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
199 reg[6] = cpu_to_fdt64(GICV_BASE_64K);
200 reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
202 /* Fixup gic node align with default */
203 reg[0] = cpu_to_fdt64(GICD_BASE);
204 reg[1] = cpu_to_fdt64(GICD_SIZE);
205 reg[2] = cpu_to_fdt64(GICC_BASE);
206 reg[3] = cpu_to_fdt64(GICC_SIZE);
207 reg[4] = cpu_to_fdt64(GICH_BASE);
208 reg[5] = cpu_to_fdt64(GICH_SIZE);
209 reg[6] = cpu_to_fdt64(GICV_BASE);
210 reg[7] = cpu_to_fdt64(GICV_SIZE);
213 err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
215 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
216 "reg", "interrupt-controller@1400000",
225 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
226 static int _fdt_fixup_msi_node(void *blob, const char *name,
227 int irq_0, int irq_1, int rev)
229 int err, offset, len;
233 offset = fdt_path_offset(blob, name);
235 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
236 name, fdt_strerror(offset));
240 /*fixup the property of interrupts*/
242 tmp[0][0] = cpu_to_fdt32(0x0);
243 tmp[0][1] = cpu_to_fdt32(irq_0);
244 tmp[0][2] = cpu_to_fdt32(0x4);
247 tmp[1][0] = cpu_to_fdt32(0x0);
248 tmp[1][1] = cpu_to_fdt32(irq_1);
249 tmp[1][2] = cpu_to_fdt32(0x4);
250 tmp[2][0] = cpu_to_fdt32(0x0);
251 tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
252 tmp[2][2] = cpu_to_fdt32(0x4);
253 tmp[3][0] = cpu_to_fdt32(0x0);
254 tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
255 tmp[3][2] = cpu_to_fdt32(0x4);
258 len = sizeof(tmp[0]);
261 err = fdt_setprop(blob, offset, "interrupts", tmp, len);
263 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
264 "interrupts", name, fdt_strerror(err));
268 /*fixup the property of reg*/
269 p = (char *)fdt_getprop(blob, offset, "reg", &len);
271 printf("WARNING: fdt_getprop can't get %s from node %s\n",
276 memcpy((char *)tmp, p, len);
279 *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
281 *((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
283 err = fdt_setprop(blob, offset, "reg", tmp, len);
285 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
286 "reg", name, fdt_strerror(err));
290 /*fixup the property of compatible*/
292 err = fdt_setprop_string(blob, offset, "compatible",
293 "fsl,ls1043a-v1.1-msi");
295 err = fdt_setprop_string(blob, offset, "compatible",
298 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
299 "compatible", name, fdt_strerror(err));
306 static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
308 int offset, len, err;
313 offset = fdt_path_offset(blob, name);
315 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
316 name, fdt_strerror(offset));
320 p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
321 if (!p || len != sizeof(tmp)) {
322 printf("WARNING: fdt_getprop can't get %s from node %s\n",
323 "interrupt-map", name);
327 memcpy((char *)tmp, p, len);
329 val = fdt32_to_cpu(tmp[0][6]);
331 tmp[1][6] = cpu_to_fdt32(val + 1);
332 tmp[2][6] = cpu_to_fdt32(val + 2);
333 tmp[3][6] = cpu_to_fdt32(val + 3);
335 tmp[1][6] = cpu_to_fdt32(val);
336 tmp[2][6] = cpu_to_fdt32(val);
337 tmp[3][6] = cpu_to_fdt32(val);
340 err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
342 printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
343 "interrupt-map", name, fdt_strerror(err));
349 /* Fixup msi node for ls1043a rev1.1*/
351 static void fdt_fixup_msi(void *blob)
353 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
356 rev = gur_in32(&gur->svr);
358 if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
363 _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
365 _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
367 _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
370 _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
371 _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
372 _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
376 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
377 /* Remove JR node used by SEC firmware */
378 void fdt_fixup_remove_jr(void *blob)
380 int jr_node, addr_cells, len;
381 int crypto_node = fdt_path_offset(blob, "crypto");
382 u64 jr_offset, used_jr;
385 used_jr = sec_firmware_used_jobring_offset();
386 fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
388 jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
389 "fsl,sec-v4.0-job-ring");
391 while (jr_node != -FDT_ERR_NOTFOUND) {
392 reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
393 jr_offset = fdt_read_number(reg, addr_cells);
394 if (jr_offset == used_jr) {
395 fdt_del_node(blob, jr_node);
398 jr_node = fdt_node_offset_by_compatible(blob, jr_node,
399 "fsl,sec-v4.0-job-ring");
404 void ft_cpu_setup(void *blob, bd_t *bd)
406 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
407 unsigned int svr = gur_in32(&gur->svr);
409 /* delete crypto node if not on an E-processor */
410 if (!IS_E_PROCESSOR(svr))
411 fdt_fixup_crypto_node(blob, 0);
412 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
414 ccsr_sec_t __iomem *sec;
416 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
417 fdt_fixup_remove_jr(blob);
418 fdt_fixup_kaslr(blob);
421 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
422 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
430 #ifdef CONFIG_SYS_NS16550
431 do_fixup_by_compat_u32(blob, "fsl,ns16550",
432 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
435 do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
436 CONFIG_SYS_CLK_FREQ, 1);
439 ft_pci_setup(blob, bd);
442 #ifdef CONFIG_FSL_ESDHC
443 fdt_fixup_esdhc(blob, bd);
446 #ifdef CONFIG_SYS_DPAA_QBMAN
447 fdt_fixup_bportals(blob);
448 fdt_fixup_qportals(blob);
449 do_fixup_by_compat_u32(blob, "fsl,qman",
450 "clock-frequency", get_qman_freq(), 1);
453 #ifdef CONFIG_SYS_DPAA_FMAN
454 fdt_fixup_fman_firmware(blob);
456 #ifndef CONFIG_ARCH_LS1012A
457 fsl_fdt_disable_usb(blob);
459 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
462 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI