2 * Copyright 2014-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
8 #include <efi_loader.h>
10 #include <fdt_support.h>
12 #ifdef CONFIG_FSL_LSCH3
13 #include <asm/arch/fdt.h>
15 #ifdef CONFIG_FSL_ESDHC
16 #include <fsl_esdhc.h>
18 #ifdef CONFIG_SYS_DPAA_FMAN
22 #include <asm/arch/mp.h>
25 #include <asm/arch-fsl-layerscape/soc.h>
26 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
27 #include <asm/armv8/sec_firmware.h>
29 #include <asm/arch/speed.h>
30 #include <fsl_qbman.h>
32 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
34 return fdt_setprop_string(blob, offset, "phy-connection-type",
35 phy_string_for_interface(phyc));
39 void ft_fixup_cpu(void *blob)
42 __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
46 size_t *boot_code_size = &(__secondary_boot_code_size);
47 u32 mask = cpu_pos_mask();
50 off = fdt_path_offset(blob, "/cpus");
52 puts("couldn't find /cpus node\n");
56 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
58 off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
60 while (off != -FDT_ERR_NOTFOUND) {
61 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
63 core_id = fdt_read_number(reg, addr_cells);
64 if (!test_bit(id_to_core(core_id), &mask)) {
65 fdt_del_node(blob, off);
70 off = fdt_node_offset_by_prop_value(blob, off_prev,
71 "device_type", "cpu", 4);
74 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \
75 defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
79 /* Check the psci version to determine if the psci is supported */
80 psci_ver = sec_firmware_support_psci_version();
81 if (psci_ver == 0xffffffff) {
82 /* remove psci DT node */
83 node = fdt_path_offset(blob, "/psci");
85 goto remove_psci_node;
87 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
89 goto remove_psci_node;
91 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
93 goto remove_psci_node;
95 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
97 goto remove_psci_node;
101 fdt_del_node(blob, node);
106 off = fdt_path_offset(blob, "/cpus");
108 puts("couldn't find /cpus node\n");
111 fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
113 off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
114 while (off != -FDT_ERR_NOTFOUND) {
115 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
117 core_id = fdt_read_number(reg, addr_cells);
118 if (core_id == 0 || (is_core_online(core_id))) {
120 val += id_to_core(core_id) *
121 SPIN_TABLE_ELEM_SIZE;
122 val = cpu_to_fdt64(val);
123 fdt_setprop_string(blob, off, "enable-method",
125 fdt_setprop(blob, off, "cpu-release-addr",
128 debug("skipping offline core\n");
131 puts("Warning: found cpu node without reg property\n");
133 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
137 fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
139 #if defined(CONFIG_EFI_LOADER) && !defined(CONFIG_SPL_BUILD)
140 efi_add_memory_map((uintptr_t)&secondary_boot_code,
141 ALIGN(*boot_code_size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
142 EFI_RESERVED_MEMORY_TYPE, false);
147 void fsl_fdt_disable_usb(void *blob)
151 * SYSCLK is used as a reference clock for USB. When the USB
152 * controller is used, SYSCLK must meet the additional requirement
155 if (CONFIG_SYS_CLK_FREQ != 100000000) {
156 off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
157 while (off != -FDT_ERR_NOTFOUND) {
158 fdt_status_disabled(blob, off);
159 off = fdt_node_offset_by_compatible(blob, off,
165 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
166 static void fdt_fixup_gic(void *blob)
170 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
172 struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
175 val = gur_in32(&gur->svr);
177 if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
179 } else if (SVR_REV(val) != REV1_0) {
180 val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
185 offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
187 printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
188 "interrupt-controller@1400000", fdt_strerror(offset));
192 /* Fixup gic node align with 64K */
194 reg[0] = cpu_to_fdt64(GICD_BASE_64K);
195 reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
196 reg[2] = cpu_to_fdt64(GICC_BASE_64K);
197 reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
198 reg[4] = cpu_to_fdt64(GICH_BASE_64K);
199 reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
200 reg[6] = cpu_to_fdt64(GICV_BASE_64K);
201 reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
203 /* Fixup gic node align with default */
204 reg[0] = cpu_to_fdt64(GICD_BASE);
205 reg[1] = cpu_to_fdt64(GICD_SIZE);
206 reg[2] = cpu_to_fdt64(GICC_BASE);
207 reg[3] = cpu_to_fdt64(GICC_SIZE);
208 reg[4] = cpu_to_fdt64(GICH_BASE);
209 reg[5] = cpu_to_fdt64(GICH_SIZE);
210 reg[6] = cpu_to_fdt64(GICV_BASE);
211 reg[7] = cpu_to_fdt64(GICV_SIZE);
214 err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
216 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
217 "reg", "interrupt-controller@1400000",
226 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
227 static int _fdt_fixup_msi_node(void *blob, const char *name,
228 int irq_0, int irq_1, int rev)
230 int err, offset, len;
234 offset = fdt_path_offset(blob, name);
236 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
237 name, fdt_strerror(offset));
241 /*fixup the property of interrupts*/
243 tmp[0][0] = cpu_to_fdt32(0x0);
244 tmp[0][1] = cpu_to_fdt32(irq_0);
245 tmp[0][2] = cpu_to_fdt32(0x4);
248 tmp[1][0] = cpu_to_fdt32(0x0);
249 tmp[1][1] = cpu_to_fdt32(irq_1);
250 tmp[1][2] = cpu_to_fdt32(0x4);
251 tmp[2][0] = cpu_to_fdt32(0x0);
252 tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
253 tmp[2][2] = cpu_to_fdt32(0x4);
254 tmp[3][0] = cpu_to_fdt32(0x0);
255 tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
256 tmp[3][2] = cpu_to_fdt32(0x4);
259 len = sizeof(tmp[0]);
262 err = fdt_setprop(blob, offset, "interrupts", tmp, len);
264 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
265 "interrupts", name, fdt_strerror(err));
269 /*fixup the property of reg*/
270 p = (char *)fdt_getprop(blob, offset, "reg", &len);
272 printf("WARNING: fdt_getprop can't get %s from node %s\n",
277 memcpy((char *)tmp, p, len);
280 *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
282 *((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
284 err = fdt_setprop(blob, offset, "reg", tmp, len);
286 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
287 "reg", name, fdt_strerror(err));
291 /*fixup the property of compatible*/
293 err = fdt_setprop_string(blob, offset, "compatible",
294 "fsl,ls1043a-v1.1-msi");
296 err = fdt_setprop_string(blob, offset, "compatible",
299 printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
300 "compatible", name, fdt_strerror(err));
307 static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
309 int offset, len, err;
314 offset = fdt_path_offset(blob, name);
316 printf("WARNING: fdt_path_offset can't find path %s: %s\n",
317 name, fdt_strerror(offset));
321 p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
322 if (!p || len != sizeof(tmp)) {
323 printf("WARNING: fdt_getprop can't get %s from node %s\n",
324 "interrupt-map", name);
328 memcpy((char *)tmp, p, len);
330 val = fdt32_to_cpu(tmp[0][6]);
332 tmp[1][6] = cpu_to_fdt32(val + 1);
333 tmp[2][6] = cpu_to_fdt32(val + 2);
334 tmp[3][6] = cpu_to_fdt32(val + 3);
336 tmp[1][6] = cpu_to_fdt32(val);
337 tmp[2][6] = cpu_to_fdt32(val);
338 tmp[3][6] = cpu_to_fdt32(val);
341 err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
343 printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
344 "interrupt-map", name, fdt_strerror(err));
350 /* Fixup msi node for ls1043a rev1.1*/
352 static void fdt_fixup_msi(void *blob)
354 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
357 rev = gur_in32(&gur->svr);
359 if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
364 _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
366 _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
368 _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
371 _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
372 _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
373 _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
377 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
378 /* Remove JR node used by SEC firmware */
379 void fdt_fixup_remove_jr(void *blob)
381 int jr_node, addr_cells, len;
382 int crypto_node = fdt_path_offset(blob, "crypto");
383 u64 jr_offset, used_jr;
386 used_jr = sec_firmware_used_jobring_offset();
387 fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
389 jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
390 "fsl,sec-v4.0-job-ring");
392 while (jr_node != -FDT_ERR_NOTFOUND) {
393 reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
394 jr_offset = fdt_read_number(reg, addr_cells);
395 if (jr_offset == used_jr) {
396 fdt_del_node(blob, jr_node);
399 jr_node = fdt_node_offset_by_compatible(blob, jr_node,
400 "fsl,sec-v4.0-job-ring");
405 void ft_cpu_setup(void *blob, bd_t *bd)
407 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
408 unsigned int svr = gur_in32(&gur->svr);
410 /* delete crypto node if not on an E-processor */
411 if (!IS_E_PROCESSOR(svr))
412 fdt_fixup_crypto_node(blob, 0);
413 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
415 ccsr_sec_t __iomem *sec;
417 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
418 if (fdt_fixup_kaslr(blob))
419 fdt_fixup_remove_jr(blob);
422 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
423 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
431 #ifdef CONFIG_SYS_NS16550
432 do_fixup_by_compat_u32(blob, "fsl,ns16550",
433 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
436 do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
437 CONFIG_SYS_CLK_FREQ, 1);
440 ft_pci_setup(blob, bd);
443 #ifdef CONFIG_FSL_ESDHC
444 fdt_fixup_esdhc(blob, bd);
447 #ifdef CONFIG_SYS_DPAA_QBMAN
448 fdt_fixup_bportals(blob);
449 fdt_fixup_qportals(blob);
450 do_fixup_by_compat_u32(blob, "fsl,qman",
451 "clock-frequency", get_qman_freq(), 1);
454 #ifdef CONFIG_SYS_DPAA_FMAN
455 fdt_fixup_fman_firmware(blob);
457 #ifndef CONFIG_ARCH_LS1012A
458 fsl_fdt_disable_usb(blob);
460 #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
463 #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI