arch/arm/cpu/armv8/fsl-layerscape/fdt.c

   1 /*
   2  * Copyright 2014-2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <libfdt.h>
   9 #include <fdt_support.h>
  10 #include <phy.h>
  11 #ifdef CONFIG_FSL_LSCH3
  12 #include <asm/arch/fdt.h>
  13 #endif
  14 #ifdef CONFIG_FSL_ESDHC
  15 #include <fsl_esdhc.h>
  16 #endif
  17 #ifdef CONFIG_SYS_DPAA_FMAN
  18 #include <fsl_fman.h>
  19 #endif
  20 #ifdef CONFIG_MP
  21 #include <asm/arch/mp.h>
  22 #endif
  23 #include <fsl_sec.h>
  24 #include <asm/arch-fsl-layerscape/soc.h>
  25 #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
  26 #include <asm/armv8/sec_firmware.h>
  27 #endif
  28
  29 int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
  30 {
  31         return fdt_setprop_string(blob, offset, "phy-connection-type",
  32                                          phy_string_for_interface(phyc));
  33 }
  34
  35 #ifdef CONFIG_MP
  36 void ft_fixup_cpu(void *blob)
  37 {
  38         int off;
  39         __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
  40         fdt32_t *reg;
  41         int addr_cells;
  42         u64 val, core_id;
  43         size_t *boot_code_size = &(__secondary_boot_code_size);
  44 #if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && defined(CONFIG_ARMV8_PSCI)
  45         int node;
  46         u32 psci_ver;
  47
  48         /* Check the psci version to determine if the psci is supported */
  49         psci_ver = sec_firmware_support_psci_version();
  50         if (psci_ver == 0xffffffff) {
  51                 /* remove psci DT node */
  52                 node = fdt_path_offset(blob, "/psci");
  53                 if (node >= 0)
  54                         goto remove_psci_node;
  55
  56                 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
  57                 if (node >= 0)
  58                         goto remove_psci_node;
  59
  60                 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
  61                 if (node >= 0)
  62                         goto remove_psci_node;
  63
  64                 node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
  65                 if (node >= 0)
  66                         goto remove_psci_node;
  67
  68 remove_psci_node:
  69                 if (node >= 0)
  70                         fdt_del_node(blob, node);
  71         } else {
  72                 return;
  73         }
  74 #endif
  75         off = fdt_path_offset(blob, "/cpus");
  76         if (off < 0) {
  77                 puts("couldn't find /cpus node\n");
  78                 return;
  79         }
  80         of_bus_default_count_cells(blob, off, &addr_cells, NULL);
  81
  82         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  83         while (off != -FDT_ERR_NOTFOUND) {
  84                 reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  85                 if (reg) {
  86                         core_id = of_read_number(reg, addr_cells);
  87                         if (core_id  == 0 || (is_core_online(core_id))) {
  88                                 val = spin_tbl_addr;
  89                                 val += id_to_core(core_id) *
  90                                        SPIN_TABLE_ELEM_SIZE;
  91                                 val = cpu_to_fdt64(val);
  92                                 fdt_setprop_string(blob, off, "enable-method",
  93                                                    "spin-table");
  94                                 fdt_setprop(blob, off, "cpu-release-addr",
  95                                             &val, sizeof(val));
  96                         } else {
  97                                 debug("skipping offline core\n");
  98                         }
  99                 } else {
 100                         puts("Warning: found cpu node without reg property\n");
 101                 }
 102                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
 103                                                     "cpu", 4);
 104         }
 105
 106         fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
 107                         *boot_code_size);
 108 }
 109 #endif
 110
 111 void ft_cpu_setup(void *blob, bd_t *bd)
 112 {
 113 #ifdef CONFIG_FSL_LSCH2
 114         struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
 115         unsigned int svr = in_be32(&gur->svr);
 116
 117         /* delete crypto node if not on an E-processor */
 118         if (!IS_E_PROCESSOR(svr))
 119                 fdt_fixup_crypto_node(blob, 0);
 120 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
 121         else {
 122                 ccsr_sec_t __iomem *sec;
 123
 124                 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
 125                 fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
 126         }
 127 #endif
 128 #endif
 129
 130 #ifdef CONFIG_MP
 131         ft_fixup_cpu(blob);
 132 #endif
 133
 134 #ifdef CONFIG_SYS_NS16550
 135         do_fixup_by_compat_u32(blob, "fsl,ns16550",
 136                                "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 137 #endif
 138
 139         do_fixup_by_compat_u32(blob, "fixed-clock",
 140                                "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 141
 142 #ifdef CONFIG_PCI
 143         ft_pci_setup(blob, bd);
 144 #endif
 145
 146 #ifdef CONFIG_FSL_ESDHC
 147         fdt_fixup_esdhc(blob, bd);
 148 #endif
 149
 150 #ifdef CONFIG_SYS_DPAA_FMAN
 151         fdt_fixup_fman_firmware(blob);
 152 #endif
 153 }