1 // SPDX-License-Identifier: GPL-2.0+
3 * ARM Cortex M3/M4/M7 SysTick timer driver
4 * (C) Copyright 2017 Renesas Electronics Europe Ltd
6 * Based on arch/arm/mach-stm32/stm32f1/timer.c
8 * Kamil Lulko, <kamil.lulko@gmail.com>
10 * Copyright 2015 ATS Advanced Telematics Systems GmbH
11 * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
13 * The SysTick timer is a 24-bit count down timer. The clock can be either the
14 * CPU clock or a reference clock. Since the timer will wrap around very quickly
15 * when using the CPU clock, and we do not handle the timer interrupts, it is
16 * expected that this driver is only ever used with a slow reference clock.
18 * The number of reference clock ticks that correspond to 10ms is normally
19 * defined in the SysTick Calibration register's TENMS field. However, on some
20 * devices this is wrong, so this driver allows the clock rate to be defined
21 * using CONFIG_SYS_HZ_CLOCK.
28 #include <linux/bitops.h>
30 DECLARE_GLOBAL_DATA_PTR;
32 /* SysTick Base Address - fixed for all Cortex M3, M4 and M7 devices */
33 #define SYSTICK_BASE 0xE000E010
42 #define TIMER_MAX_VAL 0x00FFFFFF
43 #define SYSTICK_CTRL_EN BIT(0)
44 /* Clock source: 0 = Ref clock, 1 = CPU clock */
45 #define SYSTICK_CTRL_CPU_CLK BIT(2)
46 #define SYSTICK_CAL_NOREF BIT(31)
47 #define SYSTICK_CAL_SKEW BIT(30)
48 #define SYSTICK_CAL_TENMS_MASK 0x00FFFFFF
50 /* read the 24-bit timer */
51 static ulong read_timer(void)
53 struct cm3_systick *systick = (struct cm3_systick *)SYSTICK_BASE;
55 /* The timer counts down, therefore convert to an incrementing timer */
56 return TIMER_MAX_VAL - readl(&systick->current_val);
61 struct cm3_systick *systick = (struct cm3_systick *)SYSTICK_BASE;
64 writel(TIMER_MAX_VAL, &systick->reload_val);
65 /* Any write to current_val reg clears it to 0 */
66 writel(0, &systick->current_val);
68 cal = readl(&systick->calibration);
69 if (cal & SYSTICK_CAL_NOREF)
70 /* Use CPU clock, no interrupts */
71 writel(SYSTICK_CTRL_EN | SYSTICK_CTRL_CPU_CLK, &systick->ctrl);
73 /* Use external clock, no interrupts */
74 writel(SYSTICK_CTRL_EN, &systick->ctrl);
77 * If the TENMS field is inexact or wrong, specify the clock rate using
78 * CONFIG_SYS_HZ_CLOCK.
80 #if defined(CONFIG_SYS_HZ_CLOCK)
81 gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK;
83 gd->arch.timer_rate_hz = (cal & SYSTICK_CAL_TENMS_MASK) * 100;
88 gd->arch.lastinc = read_timer();
93 /* return milli-seconds timer value */
94 ulong get_timer(ulong base)
96 unsigned long long t = get_ticks() * 1000;
98 return (ulong)((t / gd->arch.timer_rate_hz)) - base;
101 unsigned long long get_ticks(void)
103 u32 now = read_timer();
105 if (now >= gd->arch.lastinc)
106 gd->arch.tbl += (now - gd->arch.lastinc);
108 gd->arch.tbl += (TIMER_MAX_VAL - gd->arch.lastinc) + now;
110 gd->arch.lastinc = now;
115 ulong get_tbclk(void)
117 return gd->arch.timer_rate_hz;