tegra: add UART1 on GPU funcmux entry
[oweals/u-boot.git] / arch / arm / cpu / armv7 / tegra2 / funcmux.c
1 /*
2  * Copyright (c) 2011 The Chromium OS Authors.
3  * See file CREDITS for list of people who contributed to this
4  * project.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21
22 /* Tegra2 high-level function multiplexing */
23 #include <common.h>
24 #include <asm/arch/clock.h>
25 #include <asm/arch/funcmux.h>
26 #include <asm/arch/pinmux.h>
27
28 int funcmux_select(enum periph_id id, int config)
29 {
30         int bad_config = config != FUNCMUX_DEFAULT;
31
32         switch (id) {
33         case PERIPH_ID_UART1:
34                 switch (config) {
35                 case FUNCMUX_UART1_IRRX_IRTX:
36                         pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
37                         pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
38                         pinmux_tristate_disable(PINGRP_IRRX);
39                         pinmux_tristate_disable(PINGRP_IRTX);
40                         break;
41                 case FUNCMUX_UART1_UAA_UAB:
42                         pinmux_set_func(PINGRP_UAA, PMUX_FUNC_UARTA);
43                         pinmux_set_func(PINGRP_UAB, PMUX_FUNC_UARTA);
44                         pinmux_tristate_disable(PINGRP_UAA);
45                         pinmux_tristate_disable(PINGRP_UAB);
46                         bad_config = 0;
47                         break;
48                 case FUNCMUX_UART1_GPU:
49                         pinmux_set_func(PINGRP_GPU, PMUX_FUNC_UARTA);
50                         pinmux_tristate_disable(PINGRP_GPU);
51                         bad_config = 0;
52                         break;
53                 }
54                 if (!bad_config) {
55                         /*
56                          * Tegra appears to boot with function UARTA pre-
57                          * selected on mux group SDB. If two mux groups are
58                          * both set to the same function, it's unclear which
59                          * group's pins drive the RX signals into the HW.
60                          * For UARTA, SDB certainly overrides group IRTX in
61                          * practice. To solve this, configure some alternative
62                          * function on SDB to avoid the conflict. Also, tri-
63                          * state the group to avoid driving any signal onto it
64                          * until we know what's connected.
65                          */
66                         pinmux_tristate_enable(PINGRP_SDB);
67                         pinmux_set_func(PINGRP_SDB,  PMUX_FUNC_SDIO3);
68                 }
69                 break;
70
71         case PERIPH_ID_UART2:
72                 if (config == FUNCMUX_UART2_IRDA) {
73                         pinmux_set_func(PINGRP_UAD, PMUX_FUNC_IRDA);
74                         pinmux_tristate_disable(PINGRP_UAD);
75                 }
76                 break;
77
78         case PERIPH_ID_UART4:
79                 if (config == FUNCMUX_UART4_GMC) {
80                         pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
81                         pinmux_tristate_disable(PINGRP_GMC);
82                 }
83                 break;
84
85         case PERIPH_ID_DVC_I2C:
86                 /* there is only one selection, pinmux_config is ignored */
87                 if (config == FUNCMUX_DVC_I2CP) {
88                         pinmux_set_func(PINGRP_I2CP, PMUX_FUNC_I2C);
89                         pinmux_tristate_disable(PINGRP_I2CP);
90                 }
91                 break;
92
93         case PERIPH_ID_I2C1:
94                 /* support pinmux_config of 0 for now, */
95                 if (config == FUNCMUX_I2C1_RM) {
96                         pinmux_set_func(PINGRP_RM, PMUX_FUNC_I2C);
97                         pinmux_tristate_disable(PINGRP_RM);
98                 }
99                 break;
100         case PERIPH_ID_I2C2: /* I2C2 */
101                 switch (config) {
102                 case FUNCMUX_I2C2_DDC:  /* DDC pin group, select I2C2 */
103                         pinmux_set_func(PINGRP_DDC, PMUX_FUNC_I2C2);
104                         /* PTA to HDMI */
105                         pinmux_set_func(PINGRP_PTA, PMUX_FUNC_HDMI);
106                         pinmux_tristate_disable(PINGRP_DDC);
107                         break;
108                 case FUNCMUX_I2C2_PTA:  /* PTA pin group, select I2C2 */
109                         pinmux_set_func(PINGRP_PTA, PMUX_FUNC_I2C2);
110                         /* set DDC_SEL to RSVDx (RSVD2 works for now) */
111                         pinmux_set_func(PINGRP_DDC, PMUX_FUNC_RSVD2);
112                         pinmux_tristate_disable(PINGRP_PTA);
113                         bad_config = 0;
114                         break;
115                 }
116                 break;
117         case PERIPH_ID_I2C3: /* I2C3 */
118                 /* support pinmux_config of 0 for now */
119                 if (config == FUNCMUX_I2C3_DTF) {
120                         pinmux_set_func(PINGRP_DTF, PMUX_FUNC_I2C3);
121                         pinmux_tristate_disable(PINGRP_DTF);
122                 }
123                 break;
124
125         case PERIPH_ID_SDMMC2:
126                 if (config == FUNCMUX_SDMMC2_DTA_DTD_8BIT) {
127                         pinmux_set_func(PINGRP_DTA, PMUX_FUNC_SDIO2);
128                         pinmux_set_func(PINGRP_DTD, PMUX_FUNC_SDIO2);
129
130                         pinmux_tristate_disable(PINGRP_DTA);
131                         pinmux_tristate_disable(PINGRP_DTD);
132                 }
133                 break;
134
135         case PERIPH_ID_SDMMC3:
136                 switch (config) {
137                 case FUNCMUX_SDMMC3_SDB_SLXA_8BIT:
138                         pinmux_set_func(PINGRP_SLXA, PMUX_FUNC_SDIO3);
139                         pinmux_set_func(PINGRP_SLXC, PMUX_FUNC_SDIO3);
140                         pinmux_set_func(PINGRP_SLXD, PMUX_FUNC_SDIO3);
141                         pinmux_set_func(PINGRP_SLXK, PMUX_FUNC_SDIO3);
142
143                         pinmux_tristate_disable(PINGRP_SLXA);
144                         pinmux_tristate_disable(PINGRP_SLXC);
145                         pinmux_tristate_disable(PINGRP_SLXD);
146                         pinmux_tristate_disable(PINGRP_SLXK);
147                         /* fall through */
148
149                 case FUNCMUX_SDMMC3_SDB_4BIT:
150                         pinmux_set_func(PINGRP_SDB, PMUX_FUNC_SDIO3);
151                         pinmux_set_func(PINGRP_SDC, PMUX_FUNC_SDIO3);
152                         pinmux_set_func(PINGRP_SDD, PMUX_FUNC_SDIO3);
153
154                         pinmux_tristate_disable(PINGRP_SDB);
155                         pinmux_tristate_disable(PINGRP_SDC);
156                         pinmux_tristate_disable(PINGRP_SDD);
157                         bad_config = 0;
158                         break;
159                 }
160                 break;
161
162         case PERIPH_ID_SDMMC4:
163                 switch (config) {
164                 case FUNCMUX_SDMMC4_ATC_ATD_8BIT:
165                         pinmux_set_func(PINGRP_ATC, PMUX_FUNC_SDIO4);
166                         pinmux_set_func(PINGRP_ATD, PMUX_FUNC_SDIO4);
167
168                         pinmux_tristate_disable(PINGRP_ATC);
169                         pinmux_tristate_disable(PINGRP_ATD);
170                         break;
171
172                 case FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT:
173                         pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
174                         pinmux_tristate_disable(PINGRP_GME);
175                         /* fall through */
176
177                 case FUNCMUX_SDMMC4_ATB_GMA_4_BIT:
178                         pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
179                         pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
180
181                         pinmux_tristate_disable(PINGRP_ATB);
182                         pinmux_tristate_disable(PINGRP_GMA);
183                         bad_config = 0;
184                         break;
185                 }
186                 break;
187
188         case PERIPH_ID_KBC:
189                 if (config == FUNCMUX_DEFAULT) {
190                         enum pmux_pingrp grp[] = {PINGRP_KBCA, PINGRP_KBCB,
191                                 PINGRP_KBCC, PINGRP_KBCD, PINGRP_KBCE,
192                                 PINGRP_KBCF};
193                         int i;
194
195                         for (i = 0; i < ARRAY_SIZE(grp); i++) {
196                                 pinmux_tristate_disable(grp[i]);
197                                 pinmux_set_func(grp[i], PMUX_FUNC_KBC);
198                                 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP);
199                         }
200
201                         break;
202                 }
203
204         default:
205                 debug("%s: invalid periph_id %d", __func__, id);
206                 return -1;
207         }
208
209         if (bad_config) {
210                 debug("%s: invalid config %d for periph_id %d", __func__,
211                       config, id);
212                 return -1;
213         }
214
215         return 0;
216 }