4 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com>
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/clock.h>
15 #include <asm/arch/cpu.h>
16 #include <asm/arch/usb_phy.h>
20 #ifdef CONFIG_AXP152_POWER
23 #ifdef CONFIG_AXP209_POWER
26 #ifdef CONFIG_AXP221_POWER
30 #define SUNXI_USB_PMU_IRQ_ENABLE 0x800
31 #ifdef CONFIG_MACH_SUN8I_A33
32 #define SUNXI_USB_CSR 0x410
34 #define SUNXI_USB_CSR 0x404
36 #define SUNXI_USB_PASSBY_EN 1
38 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10)
39 #define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9)
40 #define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8)
41 #define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0)
43 static struct sunxi_usb_phy {
50 .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK,
54 .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,
57 #if CONFIG_SUNXI_USB_PHYS >= 3
59 .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK,
65 static int get_vbus_gpio(int index)
68 case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN);
69 case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
70 case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
75 static int get_vbus_detect_gpio(int index)
78 case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_DET);
83 static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
86 int j = 0, usbc_bit = 0;
87 void *dest = (void *)SUNXI_USB0_BASE + SUNXI_USB_CSR;
89 #ifdef CONFIG_MACH_SUN8I_A33
90 /* CSR needs to be explicitly initialized to 0 on A33 */
94 usbc_bit = 1 << (phy->id * 2);
95 for (j = 0; j < len; j++) {
96 /* set the bit address to be written */
97 clrbits_le32(dest, 0xff << 8);
98 setbits_le32(dest, (addr + j) << 8);
100 clrbits_le32(dest, usbc_bit);
103 setbits_le32(dest, 1 << 7);
105 clrbits_le32(dest, 1 << 7);
107 setbits_le32(dest, usbc_bit);
109 clrbits_le32(dest, usbc_bit);
115 static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
117 /* The following comments are machine
118 * translated from Chinese, you have been warned!
121 /* Regulation 45 ohms */
123 usb_phy_write(phy, 0x0c, 0x01, 1);
125 /* adjust PHY's magnitude and rate */
126 usb_phy_write(phy, 0x20, 0x14, 5);
128 /* threshold adjustment disconnect */
129 #if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I
130 usb_phy_write(phy, 0x2a, 3, 2);
132 usb_phy_write(phy, 0x2a, 2, 2);
138 static void sunxi_usb_phy_passby(int index, int enable)
140 unsigned long bits = 0;
144 addr = (void *)SUNXI_USB1_BASE + SUNXI_USB_PMU_IRQ_ENABLE;
146 addr = (void *)SUNXI_USB2_BASE + SUNXI_USB_PMU_IRQ_ENABLE;
148 bits = SUNXI_EHCI_AHB_ICHR8_EN |
149 SUNXI_EHCI_AHB_INCR4_BURST_EN |
150 SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
151 SUNXI_EHCI_ULPI_BYPASS_EN;
154 setbits_le32(addr, bits);
156 clrbits_le32(addr, bits);
161 void sunxi_usb_phy_enable_squelch_detect(int index, int enable)
163 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
165 usb_phy_write(phy, 0x3c, enable ? 0 : 2, 2);
168 void sunxi_usb_phy_init(int index)
170 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
171 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
173 setbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
175 sunxi_usb_phy_config(phy);
178 sunxi_usb_phy_passby(index, SUNXI_USB_PASSBY_EN);
181 void sunxi_usb_phy_exit(int index)
183 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
184 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
187 sunxi_usb_phy_passby(index, !SUNXI_USB_PASSBY_EN);
189 clrbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
192 void sunxi_usb_phy_power_on(int index)
194 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
196 if (phy->gpio_vbus >= 0)
197 gpio_set_value(phy->gpio_vbus, 1);
200 void sunxi_usb_phy_power_off(int index)
202 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
204 if (phy->gpio_vbus >= 0)
205 gpio_set_value(phy->gpio_vbus, 0);
208 int sunxi_usb_phy_vbus_detect(int index)
210 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
211 int err, retries = 3;
213 if (phy->gpio_vbus_det < 0) {
214 eprintf("Error: invalid vbus detection pin\n");
215 return phy->gpio_vbus_det;
218 err = gpio_get_value(phy->gpio_vbus_det);
220 * Vbus may have been provided by the board and just been turned of
221 * some milliseconds ago on reset, what we're measuring then is a
222 * residual charge on Vbus, sleep a bit and try again.
224 while (err > 0 && retries--) {
226 err = gpio_get_value(phy->gpio_vbus_det);
232 int sunxi_usb_phy_probe(void)
234 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
235 struct sunxi_usb_phy *phy;
238 for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) {
239 phy = &sunxi_usb_phy[i];
241 phy->gpio_vbus = get_vbus_gpio(i);
242 if (phy->gpio_vbus >= 0) {
243 ret = gpio_request(phy->gpio_vbus, "usb_vbus");
246 ret = gpio_direction_output(phy->gpio_vbus, 0);
251 phy->gpio_vbus_det = get_vbus_detect_gpio(i);
252 if (phy->gpio_vbus_det >= 0) {
253 ret = gpio_request(phy->gpio_vbus_det, "usb_vbus_det");
256 ret = gpio_direction_input(phy->gpio_vbus_det);
262 setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
267 int sunxi_usb_phy_remove(void)
269 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
270 struct sunxi_usb_phy *phy;
273 clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
275 for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) {
276 phy = &sunxi_usb_phy[i];
278 if (phy->gpio_vbus >= 0)
279 gpio_free(phy->gpio_vbus);
281 if (phy->gpio_vbus_det >= 0)
282 gpio_free(phy->gpio_vbus_det);