4 * Copyright (C) 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright (C) 2014 Roman Byshko <rbyshko@gmail.com>
8 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
10 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/clock.h>
15 #include <asm/arch/cpu.h>
16 #include <asm/arch/usb_phy.h>
20 #ifdef CONFIG_AXP152_POWER
23 #ifdef CONFIG_AXP209_POWER
26 #ifdef CONFIG_AXP221_POWER
30 #define SUNXI_USB_PMU_IRQ_ENABLE 0x800
31 #ifdef CONFIG_MACH_SUN8I_A33
32 #define SUNXI_USB_CSR 0x410
34 #define SUNXI_USB_CSR 0x404
36 #define SUNXI_USB_PASSBY_EN 1
38 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10)
39 #define SUNXI_EHCI_AHB_INCR4_BURST_EN (1 << 9)
40 #define SUNXI_EHCI_AHB_INCRX_ALIGN_EN (1 << 8)
41 #define SUNXI_EHCI_ULPI_BYPASS_EN (1 << 0)
43 static struct sunxi_usb_phy {
50 .usb_rst_mask = CCM_USB_CTRL_PHY0_RST | CCM_USB_CTRL_PHY0_CLK,
54 .usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,
57 #if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
59 .usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK,
65 static int sunxi_usb_phy_enabled_count;
67 static int get_vbus_gpio(int index)
70 case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_PIN);
71 case 1: return sunxi_name_to_gpio(CONFIG_USB1_VBUS_PIN);
72 case 2: return sunxi_name_to_gpio(CONFIG_USB2_VBUS_PIN);
77 static int get_vbus_detect_gpio(int index)
80 case 0: return sunxi_name_to_gpio(CONFIG_USB0_VBUS_DET);
85 static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
88 int j = 0, usbc_bit = 0;
89 void *dest = (void *)SUNXI_USB0_BASE + SUNXI_USB_CSR;
91 #ifdef CONFIG_MACH_SUN8I_A33
92 /* CSR needs to be explicitly initialized to 0 on A33 */
96 usbc_bit = 1 << (phy->id * 2);
97 for (j = 0; j < len; j++) {
98 /* set the bit address to be written */
99 clrbits_le32(dest, 0xff << 8);
100 setbits_le32(dest, (addr + j) << 8);
102 clrbits_le32(dest, usbc_bit);
105 setbits_le32(dest, 1 << 7);
107 clrbits_le32(dest, 1 << 7);
109 setbits_le32(dest, usbc_bit);
111 clrbits_le32(dest, usbc_bit);
117 static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
119 /* The following comments are machine
120 * translated from Chinese, you have been warned!
123 /* Regulation 45 ohms */
125 usb_phy_write(phy, 0x0c, 0x01, 1);
127 /* adjust PHY's magnitude and rate */
128 usb_phy_write(phy, 0x20, 0x14, 5);
130 /* threshold adjustment disconnect */
131 #if defined CONFIG_MACH_SUN4I || defined CONFIG_MACH_SUN6I
132 usb_phy_write(phy, 0x2a, 3, 2);
134 usb_phy_write(phy, 0x2a, 2, 2);
140 static void sunxi_usb_phy_passby(int index, int enable)
142 unsigned long bits = 0;
146 addr = (void *)SUNXI_USB1_BASE + SUNXI_USB_PMU_IRQ_ENABLE;
148 addr = (void *)SUNXI_USB2_BASE + SUNXI_USB_PMU_IRQ_ENABLE;
150 bits = SUNXI_EHCI_AHB_ICHR8_EN |
151 SUNXI_EHCI_AHB_INCR4_BURST_EN |
152 SUNXI_EHCI_AHB_INCRX_ALIGN_EN |
153 SUNXI_EHCI_ULPI_BYPASS_EN;
156 setbits_le32(addr, bits);
158 clrbits_le32(addr, bits);
163 void sunxi_usb_phy_enable_squelch_detect(int index, int enable)
165 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
167 usb_phy_write(phy, 0x3c, enable ? 0 : 2, 2);
170 int sunxi_usb_phy_probe(int index)
172 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
175 phy->gpio_vbus = get_vbus_gpio(index);
176 if (phy->gpio_vbus >= 0) {
177 ret |= gpio_request(phy->gpio_vbus, "usbc_vbus");
178 ret |= gpio_direction_output(phy->gpio_vbus, 0);
181 phy->gpio_vbus_det = get_vbus_detect_gpio(index);
182 if (phy->gpio_vbus_det >= 0) {
183 ret |= gpio_request(phy->gpio_vbus_det, "usbc_vbus_det");
184 ret |= gpio_direction_input(phy->gpio_vbus_det);
190 int sunxi_usb_phy_remove(int index)
192 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
195 if (phy->gpio_vbus >= 0)
196 ret |= gpio_free(phy->gpio_vbus);
198 if (phy->gpio_vbus_det >= 0)
199 ret |= gpio_free(phy->gpio_vbus_det);
204 void sunxi_usb_phy_init(int index)
206 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
207 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
209 /* enable common PHY only once */
210 if (sunxi_usb_phy_enabled_count == 0)
211 setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
213 setbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
215 sunxi_usb_phy_config(phy);
218 sunxi_usb_phy_passby(index, SUNXI_USB_PASSBY_EN);
220 sunxi_usb_phy_enabled_count++;
223 void sunxi_usb_phy_exit(int index)
225 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
226 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
229 sunxi_usb_phy_passby(index, !SUNXI_USB_PASSBY_EN);
231 clrbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
233 /* disable common PHY only once, for the last enabled phy */
234 if (sunxi_usb_phy_enabled_count == 1)
235 clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
237 sunxi_usb_phy_enabled_count--;
240 void sunxi_usb_phy_power_on(int index)
242 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
244 if (phy->gpio_vbus >= 0)
245 gpio_set_value(phy->gpio_vbus, 1);
248 void sunxi_usb_phy_power_off(int index)
250 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
252 if (phy->gpio_vbus >= 0)
253 gpio_set_value(phy->gpio_vbus, 0);
256 int sunxi_usb_phy_vbus_detect(int index)
258 struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
259 int err, retries = 3;
261 if (phy->gpio_vbus_det < 0) {
262 eprintf("Error: invalid vbus detection pin\n");
263 return phy->gpio_vbus_det;
266 err = gpio_get_value(phy->gpio_vbus_det);
268 * Vbus may have been provided by the board and just been turned of
269 * some milliseconds ago on reset, what we're measuring then is a
270 * residual charge on Vbus, sleep a bit and try again.
272 while (err > 0 && retries--) {
274 err = gpio_get_value(phy->gpio_vbus_det);