2 * (C) Copyright 2007-2011
3 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
4 * Tom Cubie <tangliang@allwinnertech.com>
6 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/gpio.h>
13 int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
15 u32 bank = GPIO_BANK(pin);
16 u32 index = GPIO_CFG_INDEX(pin);
17 u32 offset = GPIO_CFG_OFFSET(pin);
18 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
20 clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
25 int sunxi_gpio_get_cfgpin(u32 pin)
28 u32 bank = GPIO_BANK(pin);
29 u32 index = GPIO_CFG_INDEX(pin);
30 u32 offset = GPIO_CFG_OFFSET(pin);
31 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
33 cfg = readl(&pio->cfg[0] + index);
39 int sunxi_gpio_set_drv(u32 pin, u32 val)
41 u32 bank = GPIO_BANK(pin);
42 u32 index = GPIO_DRV_INDEX(pin);
43 u32 offset = GPIO_DRV_OFFSET(pin);
44 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
46 clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset);
51 int sunxi_gpio_set_pull(u32 pin, u32 val)
53 u32 bank = GPIO_BANK(pin);
54 u32 index = GPIO_PULL_INDEX(pin);
55 u32 offset = GPIO_PULL_OFFSET(pin);
56 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
58 clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset);