2 * sun6i specific clock code
4 * (C) Copyright 2007-2012
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
8 * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net>
10 * SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch/clock.h>
16 #include <asm/arch/prcm.h>
17 #include <asm/arch/sys_proto.h>
19 void clock_init_uart(void)
21 struct sunxi_ccm_reg *const ccm =
22 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
24 #if CONFIG_CONS_INDEX < 5
25 /* uart clock source is apb2 */
26 writel(APB2_CLK_SRC_OSC24M|
31 /* open the clock for uart */
32 setbits_le32(&ccm->apb2_gate,
33 CLK_GATE_OPEN << (APB2_GATE_UART_SHIFT +
34 CONFIG_CONS_INDEX - 1));
36 /* deassert uart reset */
37 setbits_le32(&ccm->apb2_reset_cfg,
38 1 << (APB2_RESET_UART_SHIFT +
39 CONFIG_CONS_INDEX - 1));
41 /* enable R_PIO and R_UART clocks, and de-assert resets */
42 prcm_apb0_enable(PRCM_APB0_GATE_PIO | PRCM_APB0_GATE_UART);
45 /* Dup with clock_init_safe(), drop once sun6i SPL support lands */
46 writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg);
49 int clock_twi_onoff(int port, int state)
51 struct sunxi_ccm_reg *const ccm =
52 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
57 /* set the apb clock gate for twi */
59 setbits_le32(&ccm->apb2_gate,
60 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
62 clrbits_le32(&ccm->apb2_gate,
63 CLK_GATE_OPEN << (APB2_GATE_TWI_SHIFT+port));
68 unsigned int clock_get_pll6(void)
70 struct sunxi_ccm_reg *const ccm =
71 (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
72 uint32_t rval = readl(&ccm->pll6_cfg);
73 int n = ((rval & CCM_PLL6_CTRL_N_MASK) >> CCM_PLL6_CTRL_N_SHIFT) + 1;
74 int k = ((rval & CCM_PLL6_CTRL_K_MASK) >> CCM_PLL6_CTRL_K_SHIFT) + 1;
75 return 24000000 * n * k / 2;