2 * Copyright (C) 2011 Samsung Electronics
4 * Donghwa Lee <dh09.lee@samsung.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/pwm.h>
30 #include <asm/arch/clk.h>
32 int pwm_enable(int pwm_id)
34 const struct s5p_timer *pwm =
35 (struct s5p_timer *)samsung_get_base_timer();
38 tcon = readl(&pwm->tcon);
39 tcon |= TCON_START(pwm_id);
41 writel(tcon, &pwm->tcon);
46 void pwm_disable(int pwm_id)
48 const struct s5p_timer *pwm =
49 (struct s5p_timer *)samsung_get_base_timer();
52 tcon = readl(&pwm->tcon);
53 tcon &= ~TCON_START(pwm_id);
55 writel(tcon, &pwm->tcon);
58 static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
60 unsigned long tin_parent_rate;
63 tin_parent_rate = get_pwm_clk();
65 for (div = 2; div <= 16; div *= 2) {
66 if ((tin_parent_rate / (div << 16)) < freq)
67 return tin_parent_rate / div;
70 return tin_parent_rate / 16;
73 #define NS_IN_HZ (1000000000UL)
75 int pwm_config(int pwm_id, int duty_ns, int period_ns)
77 const struct s5p_timer *pwm =
78 (struct s5p_timer *)samsung_get_base_timer();
80 unsigned long tin_rate;
88 * We currently avoid using 64bit arithmetic by using the
89 * fact that anything faster than 1GHz is easily representable
92 if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
95 if (duty_ns > period_ns)
98 period = NS_IN_HZ / period_ns;
100 /* Check to see if we are changing the clock rate of the PWM */
101 tin_rate = pwm_calc_tin(pwm_id, period);
103 tin_ns = NS_IN_HZ / tin_rate;
104 tcnt = period_ns / tin_ns;
106 /* Note, counters count down */
107 tcmp = duty_ns / tin_ns;
111 * the pwm hw only checks the compare register after a decrement,
112 * so the pin never toggles if tcmp = tcnt
120 /* Update the PWM register block. */
123 writel(tcnt, &pwm->tcntb0 + offset);
124 writel(tcmp, &pwm->tcmpb0 + offset);
127 tcon = readl(&pwm->tcon);
128 tcon |= TCON_UPDATE(pwm_id);
130 tcon |= TCON_AUTO_RELOAD(pwm_id);
132 tcon |= TCON4_AUTO_RELOAD;
133 writel(tcon, &pwm->tcon);
135 tcon &= ~TCON_UPDATE(pwm_id);
136 writel(tcon, &pwm->tcon);
141 int pwm_init(int pwm_id, int div, int invert)
144 const struct s5p_timer *pwm =
145 (struct s5p_timer *)samsung_get_base_timer();
146 unsigned long timer_rate_hz;
147 unsigned int offset, prescaler;
151 * PWM_CLK / { (prescaler_value + 1) * (divider_value) }
154 val = readl(&pwm->tcfg0);
156 prescaler = PRESCALER_0;
158 val |= (prescaler & 0xff);
160 prescaler = PRESCALER_1;
162 val |= (prescaler & 0xff) << 8;
164 writel(val, &pwm->tcfg0);
165 val = readl(&pwm->tcfg1);
166 val &= ~(0xf << MUX_DIV_SHIFT(pwm_id));
167 val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id);
168 writel(val, &pwm->tcfg1);
170 timer_rate_hz = get_pwm_clk() / ((prescaler + 1) *
173 timer_rate_hz = timer_rate_hz / 100;
175 /* set count value */
177 writel(timer_rate_hz, &pwm->tcntb0 + offset);
179 val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
180 if (invert && (pwm_id < 4))
181 val |= TCON_INVERTER(pwm_id);
182 writel(val, &pwm->tcon);