2 * Copyright (C) 2011 Samsung Electronics
4 * Donghwa Lee <dh09.lee@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/pwm.h>
14 #include <asm/arch/clk.h>
16 int pwm_enable(int pwm_id)
18 const struct s5p_timer *pwm =
19 (struct s5p_timer *)samsung_get_base_timer();
22 tcon = readl(&pwm->tcon);
23 tcon |= TCON_START(pwm_id);
25 writel(tcon, &pwm->tcon);
30 void pwm_disable(int pwm_id)
32 const struct s5p_timer *pwm =
33 (struct s5p_timer *)samsung_get_base_timer();
36 tcon = readl(&pwm->tcon);
37 tcon &= ~TCON_START(pwm_id);
39 writel(tcon, &pwm->tcon);
42 static unsigned long pwm_calc_tin(int pwm_id, unsigned long freq)
44 unsigned long tin_parent_rate;
47 tin_parent_rate = get_pwm_clk();
49 for (div = 2; div <= 16; div *= 2) {
50 if ((tin_parent_rate / (div << 16)) < freq)
51 return tin_parent_rate / div;
54 return tin_parent_rate / 16;
57 #define NS_IN_SEC 1000000000UL
59 int pwm_config(int pwm_id, int duty_ns, int period_ns)
61 const struct s5p_timer *pwm =
62 (struct s5p_timer *)samsung_get_base_timer();
64 unsigned long tin_rate;
66 unsigned long frequency;
72 * We currently avoid using 64bit arithmetic by using the
73 * fact that anything faster than 1GHz is easily representable
76 if (period_ns > NS_IN_SEC || duty_ns > NS_IN_SEC || period_ns == 0)
79 if (duty_ns > period_ns)
82 frequency = NS_IN_SEC / period_ns;
84 /* Check to see if we are changing the clock rate of the PWM */
85 tin_rate = pwm_calc_tin(pwm_id, frequency);
87 tin_ns = NS_IN_SEC / tin_rate;
88 tcnt = period_ns / tin_ns;
90 /* Note, counters count down */
91 tcmp = duty_ns / tin_ns;
94 /* Update the PWM register block. */
97 writel(tcnt, &pwm->tcntb0 + offset);
98 writel(tcmp, &pwm->tcmpb0 + offset);
101 tcon = readl(&pwm->tcon);
102 tcon |= TCON_UPDATE(pwm_id);
104 tcon |= TCON_AUTO_RELOAD(pwm_id);
106 tcon |= TCON4_AUTO_RELOAD;
107 writel(tcon, &pwm->tcon);
109 tcon &= ~TCON_UPDATE(pwm_id);
110 writel(tcon, &pwm->tcon);
115 int pwm_init(int pwm_id, int div, int invert)
118 const struct s5p_timer *pwm =
119 (struct s5p_timer *)samsung_get_base_timer();
120 unsigned long ticks_per_period;
121 unsigned int offset, prescaler;
125 * PWM_CLK / { (prescaler_value + 1) * (divider_value) }
128 val = readl(&pwm->tcfg0);
130 prescaler = PRESCALER_0;
132 val |= (prescaler & 0xff);
134 prescaler = PRESCALER_1;
136 val |= (prescaler & 0xff) << 8;
138 writel(val, &pwm->tcfg0);
139 val = readl(&pwm->tcfg1);
140 val &= ~(0xf << MUX_DIV_SHIFT(pwm_id));
141 val |= (div & 0xf) << MUX_DIV_SHIFT(pwm_id);
142 writel(val, &pwm->tcfg1);
146 * TODO(sjg): Use this as a countdown timer for now. We count
147 * down from the maximum value to 0, then reset.
149 ticks_per_period = -1UL;
151 const unsigned long pwm_hz = 1000;
152 unsigned long timer_rate_hz = get_pwm_clk() /
153 ((prescaler + 1) * (1 << div));
155 ticks_per_period = timer_rate_hz / pwm_hz;
158 /* set count value */
161 writel(ticks_per_period, &pwm->tcntb0 + offset);
163 val = readl(&pwm->tcon) & ~(0xf << TCON_OFFSET(pwm_id));
164 if (invert && (pwm_id < 4))
165 val |= TCON_INVERTER(pwm_id);
166 writel(val, &pwm->tcon);