3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #include <asm/arch/mem.h> /* get mem tables */
31 #include <asm/arch/sys_proto.h>
34 extern omap3_sysinfo sysinfo;
35 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
36 static char *rev_s[CPU_3XX_MAX_REV] = {
43 /*****************************************************************
44 * dieid_num_r(void) - read and set die ID
45 *****************************************************************/
46 void dieid_num_r(void)
48 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
49 char *uid_s, die_id[34];
52 memset(die_id, 0, sizeof(die_id));
54 uid_s = getenv("dieid#");
57 id[3] = readl(&id_base->die_id_0);
58 id[2] = readl(&id_base->die_id_1);
59 id[1] = readl(&id_base->die_id_2);
60 id[0] = readl(&id_base->die_id_3);
61 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
62 setenv("dieid#", die_id);
66 printf("Die ID #%s\n", uid_s);
69 /******************************************
70 * get_cpu_type(void) - extract cpu info
71 ******************************************/
72 u32 get_cpu_type(void)
74 return readl(&ctrl_base->ctrl_omap_stat);
77 /******************************************
78 * get_cpu_rev(void) - extract version info
79 ******************************************/
83 struct ctrl_id *id_base;
86 * On ES1.0 the IDCODE register is not exposed on L4
87 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
89 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
90 if ((cpuid & 0xf) == 0x0)
93 /* Decode the IDs on > ES1.0 */
94 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
96 cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xf;
98 /* Some early ES2.0 seem to report ID 0, fix this */
100 cpuid = CPU_3XX_ES20;
106 /***************************************************************************
107 * get_gpmc0_base() - Return current address hardware will be
108 * fetching from. The below effectively gives what is correct, its a bit
109 * mis-leading compared to the TRM. For the most general case the mask
110 * needs to be also taken into account this does work in practice.
111 * - for u-boot we currently map:
116 ****************************************************************************/
117 u32 get_gpmc0_base(void)
121 b = readl(&gpmc_cfg->cs[0].config7);
122 b &= 0x1F; /* keep base [5:0] */
123 b = b << 24; /* ret 0x0b000000 */
127 /*******************************************************************
128 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
129 *******************************************************************/
130 u32 get_gpmc0_width(void)
135 /*************************************************************************
136 * get_board_rev() - setup to pass kernel board revision information
137 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
138 *************************************************************************/
139 u32 get_board_rev(void)
144 /********************************************************
145 * get_base(); get upper addr of current execution
146 *******************************************************/
151 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
157 /********************************************************
158 * is_running_in_flash() - tell if currently running in
160 *******************************************************/
161 u32 is_running_in_flash(void)
164 return 1; /* in FLASH */
166 return 0; /* running in SRAM or SDRAM */
169 /********************************************************
170 * is_running_in_sram() - tell if currently running in
172 *******************************************************/
173 u32 is_running_in_sram(void)
176 return 1; /* in SRAM */
178 return 0; /* running in FLASH or SDRAM */
181 /********************************************************
182 * is_running_in_sdram() - tell if currently running in
184 *******************************************************/
185 u32 is_running_in_sdram(void)
188 return 1; /* in SDRAM */
190 return 0; /* running in SRAM or FLASH */
193 /***************************************************************
194 * get_boot_type() - Is this an XIP type device or a stream one
195 * bits 4-0 specify type. Bit 5 says mem/perif
196 ***************************************************************/
197 u32 get_boot_type(void)
199 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
202 /*************************************************************
203 * get_device_type(): tell if GP/HS/EMU/TST
204 *************************************************************/
205 u32 get_device_type(void)
207 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
210 #ifdef CONFIG_DISPLAY_CPUINFO
212 * Print CPU information
214 int print_cpuinfo (void)
218 switch (get_cpu_type()) {
236 switch (get_device_type()) {
253 printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n",
254 cpu_s, sec_s, rev_s[get_cpu_rev()]);
258 #endif /* CONFIG_DISPLAY_CPUINFO */