3 * Texas Instruments, <www.ti.com>
6 * Manikandan Pillai <mani.pillai@ti.com>
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/mem.h> /* get mem tables */
18 #include <asm/arch/sys_proto.h>
20 #include <linux/compiler.h>
22 extern omap3_sysinfo sysinfo;
23 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
25 #ifdef CONFIG_DISPLAY_CPUINFO
26 static char *rev_s[CPU_3XX_MAX_REV] = {
36 /* this is the revision table for 37xx CPUs */
37 static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
41 #endif /* CONFIG_DISPLAY_CPUINFO */
43 /*****************************************************************
44 * get_dieid(u32 *id) - read die ID
45 *****************************************************************/
46 void get_dieid(u32 *id)
48 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
50 id[3] = readl(&id_base->die_id_0);
51 id[2] = readl(&id_base->die_id_1);
52 id[1] = readl(&id_base->die_id_2);
53 id[0] = readl(&id_base->die_id_3);
56 /*****************************************************************
57 * dieid_num_r(void) - read and set die ID
58 *****************************************************************/
59 void dieid_num_r(void)
61 char *uid_s, die_id[34];
64 memset(die_id, 0, sizeof(die_id));
66 uid_s = getenv("dieid#");
70 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
71 setenv("dieid#", die_id);
75 printf("Die ID #%s\n", uid_s);
78 /******************************************
79 * get_cpu_type(void) - extract cpu info
80 ******************************************/
81 u32 get_cpu_type(void)
83 return readl(&ctrl_base->ctrl_omap_stat);
86 /******************************************
87 * get_cpu_id(void) - extract cpu id
88 * returns 0 for ES1.0, cpuid otherwise
89 ******************************************/
92 struct ctrl_id *id_base;
96 * On ES1.0 the IDCODE register is not exposed on L4
97 * so using CPU ID to differentiate between ES1.0 and > ES1.0.
99 __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
100 if ((cpuid & 0xf) == 0x0) {
103 /* Decode the IDs on > ES1.0 */
104 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
106 cpuid = readl(&id_base->idcode);
112 /******************************************
113 * get_cpu_family(void) - extract cpu info
114 ******************************************/
115 u32 get_cpu_family(void)
119 u32 cpuid = get_cpu_id();
124 hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
126 case HAWKEYE_OMAP34XX:
127 cpu_family = CPU_OMAP34XX;
130 cpu_family = CPU_AM35XX;
132 case HAWKEYE_OMAP36XX:
133 cpu_family = CPU_OMAP36XX;
136 cpu_family = CPU_OMAP34XX;
142 /******************************************
143 * get_cpu_rev(void) - extract version info
144 ******************************************/
145 u32 get_cpu_rev(void)
147 u32 cpuid = get_cpu_id();
152 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
155 /*****************************************************************
156 * get_sku_id(void) - read sku_id to get info on max clock rate
157 *****************************************************************/
160 struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
161 return readl(&id_base->sku_id) & SKUID_CLK_MASK;
164 /***************************************************************************
165 * get_gpmc0_base() - Return current address hardware will be
166 * fetching from. The below effectively gives what is correct, its a bit
167 * mis-leading compared to the TRM. For the most general case the mask
168 * needs to be also taken into account this does work in practice.
169 * - for u-boot we currently map:
174 ****************************************************************************/
175 u32 get_gpmc0_base(void)
179 b = readl(&gpmc_cfg->cs[0].config7);
180 b &= 0x1F; /* keep base [5:0] */
181 b = b << 24; /* ret 0x0b000000 */
185 /*******************************************************************
186 * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
187 *******************************************************************/
188 u32 get_gpmc0_width(void)
193 /*************************************************************************
194 * get_board_rev() - setup to pass kernel board revision information
195 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
196 *************************************************************************/
197 u32 __weak get_board_rev(void)
202 /********************************************************
203 * get_base(); get upper addr of current execution
204 *******************************************************/
205 static u32 get_base(void)
209 __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
215 /********************************************************
216 * is_running_in_flash() - tell if currently running in
218 *******************************************************/
219 u32 is_running_in_flash(void)
222 return 1; /* in FLASH */
224 return 0; /* running in SRAM or SDRAM */
227 /********************************************************
228 * is_running_in_sram() - tell if currently running in
230 *******************************************************/
231 u32 is_running_in_sram(void)
234 return 1; /* in SRAM */
236 return 0; /* running in FLASH or SDRAM */
239 /********************************************************
240 * is_running_in_sdram() - tell if currently running in
242 *******************************************************/
243 u32 is_running_in_sdram(void)
246 return 1; /* in SDRAM */
248 return 0; /* running in SRAM or FLASH */
251 /***************************************************************
252 * get_boot_type() - Is this an XIP type device or a stream one
253 * bits 4-0 specify type. Bit 5 says mem/perif
254 ***************************************************************/
255 u32 get_boot_type(void)
257 return (readl(&ctrl_base->status) & SYSBOOT_MASK);
260 /*************************************************************
261 * get_device_type(): tell if GP/HS/EMU/TST
262 *************************************************************/
263 u32 get_device_type(void)
265 return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
268 #ifdef CONFIG_DISPLAY_CPUINFO
270 * Print CPU information
272 int print_cpuinfo (void)
274 char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
276 switch (get_cpu_family()) {
278 cpu_family_s = "OMAP";
279 switch (get_cpu_type()) {
296 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
297 (get_sku_id() == SKUID_CLK_720MHZ))
305 switch (get_cpu_type()) {
319 cpu_family_s = "OMAP";
320 switch (get_cpu_type()) {
331 cpu_family_s = "OMAP";
336 switch (get_device_type()) {
353 if (CPU_OMAP36XX == get_cpu_family())
354 printf("%s%s-%s ES%s, CPU-OPP2, L3-200MHz, Max CPU Clock %s\n",
355 cpu_family_s, cpu_s, sec_s,
356 rev_s_37xx[get_cpu_rev()], max_clk);
358 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
359 cpu_family_s, cpu_s, sec_s,
360 rev_s[get_cpu_rev()], max_clk);
364 #endif /* CONFIG_DISPLAY_CPUINFO */