3 * Common functions for OMAP4/5 based boards
6 * Texas Instruments, <www.ti.com>
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
12 * See file CREDITS for list of people who contributed to this
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 #include <asm/arch/sys_proto.h>
32 #include <asm/sizes.h>
36 DECLARE_GLOBAL_DATA_PTR;
38 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
41 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
43 for (i = 0; i < size; i++, pad++)
44 writew(pad->val, base + pad->offset);
47 static void set_mux_conf_regs(void)
49 switch (omap_hw_init_context()) {
50 case OMAP_INIT_CONTEXT_SPL:
51 set_muxconf_regs_essential();
53 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
54 #ifdef CONFIG_SYS_ENABLE_PADS_ALL
55 set_muxconf_regs_non_essential();
58 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
59 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
60 set_muxconf_regs_essential();
61 #ifdef CONFIG_SYS_ENABLE_PADS_ALL
62 set_muxconf_regs_non_essential();
73 /* Read Main ID Register (MIDR) */
74 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
79 void omap_rev_string(void)
81 u32 omap_rev = omap_revision();
82 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
83 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
84 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
86 printf("OMAP%x ES%x.%x\n", omap_variant, major_rev,
90 #ifdef CONFIG_SPL_BUILD
91 static void init_boot_params(void)
93 boot_params_ptr = (u32 *) &boot_params;
96 void spl_display_print(void)
104 * Description: Does early system init of watchdog, muxing, andclocks
105 * Watchdog disable is done always. For the rest what gets done
106 * depends on the boot mode in which this function is executed
107 * 1. s_init of SPL running from SRAM
108 * 2. s_init of U-Boot running from FLASH
109 * 3. s_init of U-Boot loaded to SDRAM by SPL
110 * 4. s_init of U-Boot loaded to SDRAM by ROM code using the
111 * Configuration Header feature
112 * Please have a look at the respective functions to see what gets
113 * done in each of these cases
114 * This function is called with SRAM stack.
118 init_omap_revision();
119 #ifdef CONFIG_SPL_BUILD
120 if (warm_reset() && (omap_revision() <= OMAP5430_ES1_0))
121 force_emif_self_refresh();
125 #ifdef CONFIG_SPL_BUILD
126 setup_clocks_for_console();
127 preloader_console_init();
131 #ifdef CONFIG_SPL_BUILD
134 /* For regular u-boot sdram_init() is called from dram_init() */
141 * Routine: wait_for_command_complete
142 * Description: Wait for posting to finish on watchdog
144 void wait_for_command_complete(struct watchdog *wd_base)
148 pending = readl(&wd_base->wwps);
153 * Routine: watchdog_init
154 * Description: Shut down watch dogs
156 void watchdog_init(void)
158 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
160 writel(WD_UNLOCK1, &wd2_base->wspr);
161 wait_for_command_complete(wd2_base);
162 writel(WD_UNLOCK2, &wd2_base->wspr);
167 * This function finds the SDRAM size available in the system
168 * based on DMM section configurations
169 * This is needed because the size of memory installed may be
170 * different on different versions of the board
172 u32 omap_sdram_size(void)
174 u32 section, i, valid;
175 u64 sdram_start = 0, sdram_end = 0, addr,
176 size, total_size = 0, trap_size = 0;
178 for (i = 0; i < 4; i++) {
179 section = __raw_readl(DMM_BASE + i*4);
180 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
181 (EMIF_SDRC_ADDRSPC_SHIFT);
182 addr = section & EMIF_SYS_ADDR_MASK;
184 /* See if the address is valid */
185 if ((addr >= DRAM_ADDR_SPACE_START) &&
186 (addr < DRAM_ADDR_SPACE_END)) {
187 size = ((section & EMIF_SYS_SIZE_MASK) >>
188 EMIF_SYS_SIZE_SHIFT);
192 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
193 if (!sdram_start || (addr < sdram_start))
195 if (!sdram_end || ((addr + size) > sdram_end))
196 sdram_end = addr + size;
204 total_size = (sdram_end - sdram_start) - (trap_size);
212 * Description: sets uboots idea of sdram size
217 gd->ram_size = omap_sdram_size();
222 * Print board information
226 puts(sysinfo.board_string);
231 * get_device_type(): tell if GP/HS/EMU/TST
233 u32 get_device_type(void)
235 struct omap_sys_ctrl_regs *ctrl =
236 (struct omap_sys_ctrl_regs *) SYSCTRL_GENERAL_CORE_BASE;
238 return (readl(&ctrl->control_status) &
239 (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
243 * Print CPU information
245 int print_cpuinfo(void)
252 #ifndef CONFIG_SYS_DCACHE_OFF
253 void enable_caches(void)
255 /* Enable D-cache. I-cache is already enabled in start.S */