4 * System information functions
6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
12 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/sys_proto.h>
18 #include <asm/arch/cpu.h>
19 #include <asm/arch/clock.h>
20 #include <power/tps65910.h>
21 #include <linux/compiler.h>
23 struct ctrl_stat *cstat = (struct ctrl_stat *)CTRL_BASE;
26 * get_cpu_rev(void) - extract rev info
33 id = readl(DEVICE_ID);
34 rev = (id >> 28) & 0xff;
40 * get_cpu_type(void) - extract cpu info
42 u32 get_cpu_type(void)
47 id = readl(DEVICE_ID);
48 partnum = (id >> 12) & 0xffff;
54 * get_device_type(): tell if GP/HS/EMU/TST
56 u32 get_device_type(void)
59 mode = readl(&cstat->statusreg) & (DEVICE_MASK);
64 * get_sysboot_value(void) - return SYS_BOOT[4:0]
66 u32 get_sysboot_value(void)
69 mode = readl(&cstat->statusreg) & (SYSBOOT_MASK);
73 #ifdef CONFIG_DISPLAY_CPUINFO
74 static char *cpu_revs[] = {
80 static char *dev_types[] = {
87 * Print CPU information
89 int print_cpuinfo(void)
91 char *cpu_s, *sec_s, *rev_s;
93 switch (get_cpu_type()) {
101 cpu_s = "Unknown CPU type";
105 if (get_cpu_rev() < ARRAY_SIZE(cpu_revs))
106 rev_s = cpu_revs[get_cpu_rev()];
110 if (get_device_type() < ARRAY_SIZE(dev_types))
111 sec_s = dev_types[get_device_type()];
115 printf("%s-%s rev %s\n", cpu_s, sec_s, rev_s);
119 #endif /* CONFIG_DISPLAY_CPUINFO */
122 int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)
126 sil_rev = readl(&cdev->deviceid) >> 28;
129 /* PG 2.0, efuse may not be set. */
131 else if (sil_rev >= 2) {
132 /* Check what the efuse says our max speed is. */
133 int efuse_arm_mpu_max_freq;
134 efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma);
135 switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) {
136 case AM335X_ZCZ_1000:
137 return MPUPLL_M_1000;
151 /* PG 1.0 or otherwise unknown, use the PG1.0 max */
155 int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)
157 /* For PG2.1 and later, we have one set of values. */
161 return TPS65910_OP_REG_SEL_1_3_2_5;
163 return TPS65910_OP_REG_SEL_1_2_6;
165 return TPS65910_OP_REG_SEL_1_2_0;
168 return TPS65910_OP_REG_SEL_1_1_3;
172 /* Default to PG1.0/PG2.0 values. */
173 return TPS65910_OP_REG_SEL_1_1_3;