2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * See file CREDITS for list of people who contributed to this
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm-offsets.h>
39 *************************************************************************
41 * Jump vector table as in table 3.1 in [1]
43 *************************************************************************
50 ldr pc, _undefined_instruction
51 ldr pc, _software_interrupt
52 ldr pc, _prefetch_abort
58 _undefined_instruction:
59 .word undefined_instruction
61 .word software_interrupt
73 .balignl 16,0xdeadbeef
78 *************************************************************************
80 * Startup Code (reset vector)
82 * do important init only if we don't start from memory!
83 * setup Memory and board specific bits prior to relocation.
84 * relocate armboot to ram
87 *************************************************************************
92 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
93 .word CONFIG_SPL_TEXT_BASE
95 .word CONFIG_SYS_TEXT_BASE
99 * These are defined in the board-specific linker script.
100 * Subtracting _start from them lets the linker put their
101 * relative position in the executable instead of leaving
104 .globl _bss_start_ofs
106 .word __bss_start - _start
110 .word __bss_end - _start
116 #ifdef CONFIG_USE_IRQ
117 /* IRQ stack memory (calculated at run-time) */
118 .globl IRQ_STACK_START
122 /* IRQ stack memory (calculated at run-time) */
123 .globl FIQ_STACK_START
128 /* IRQ stack memory (calculated at run-time) + 8 bytes */
129 .globl IRQ_STACK_START_IN
134 * the actual reset code
139 * set the cpu to SVC32 mode
147 * we do sys-critical inits only at reboot,
148 * not when booting from ram!
150 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
156 /*------------------------------------------------------------------------------*/
158 .globl c_runtime_cpu_setup
164 *************************************************************************
166 * CPU_init_critical registers
168 * setup important registers
169 * setup memory timing
171 *************************************************************************
175 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
178 * flush v4 I/D caches
181 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
182 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
185 * disable MMU stuff and caches
187 mrc p15, 0, r0, c1, c0, 0
188 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
189 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
190 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
191 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
192 mcr p15, 0, r0, c1, c0, 0
195 * Go setup Memory and board specific bits prior to relocation.
197 mov ip, lr /* perserve link reg across call */
198 bl lowlevel_init /* go setup memory */
199 mov lr, ip /* restore link */
200 mov pc, lr /* back to my caller */
203 *************************************************************************
207 *************************************************************************
213 #define S_FRAME_SIZE 72
235 #define MODE_SVC 0x13
239 * use bad_save_user_regs for abort/prefetch/undef/swi ...
240 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
243 .macro bad_save_user_regs
244 @ carve out a frame on current user stack
245 sub sp, sp, #S_FRAME_SIZE
246 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
248 ldr r2, IRQ_STACK_START_IN
249 @ get values for "aborted" pc and cpsr (into parm regs)
251 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
254 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
255 mov r0, sp @ save current stack into r0 (param register)
258 .macro irq_save_user_regs
259 sub sp, sp, #S_FRAME_SIZE
260 stmia sp, {r0 - r12} @ Calling r0-r12
261 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
263 stmdb r8, {sp, lr}^ @ Calling SP, LR
264 str lr, [r8, #0] @ Save calling PC
266 str r6, [r8, #4] @ Save CPSR
267 str r0, [r8, #8] @ Save OLD_R0
271 .macro irq_restore_user_regs
272 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
274 ldr lr, [sp, #S_PC] @ Get PC
275 add sp, sp, #S_FRAME_SIZE
276 subs pc, lr, #4 @ return & move spsr_svc into cpsr
280 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
282 str lr, [r13] @ save caller lr in position 0 of saved stack
283 mrs lr, spsr @ get the spsr
284 str lr, [r13, #4] @ save spsr in position 1 of saved stack
285 mov r13, #MODE_SVC @ prepare SVC-Mode
287 msr spsr, r13 @ switch modes, make sure moves will execute
288 mov lr, pc @ capture return pc
289 movs pc, lr @ jump to next instruction & switch modes.
292 .macro get_irq_stack @ setup IRQ stack
293 ldr sp, IRQ_STACK_START
296 .macro get_fiq_stack @ setup FIQ stack
297 ldr sp, FIQ_STACK_START
304 undefined_instruction:
307 bl do_undefined_instruction
313 bl do_software_interrupt
333 #ifdef CONFIG_USE_IRQ
340 irq_restore_user_regs
345 /* someone ought to write a more effiction fiq_save_user_regs */
348 irq_restore_user_regs
366 # ifdef CONFIG_INTEGRATOR
368 /* Satisfied by general board level routine */
376 ldr r1, rstctl1 /* get clkm1 reset ctl */
378 strh r3, [r1] /* clear it */
380 strh r3, [r1] /* force dsp+arm reset */
387 #endif /* #ifdef CONFIG_INTEGRATOR */