2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * SPDX-License-Identifier: GPL-2.0+
18 #include <asm-offsets.h>
23 *************************************************************************
25 * Jump vector table as in table 3.1 in [1]
27 *************************************************************************
34 ldr pc, _undefined_instruction
35 ldr pc, _software_interrupt
36 ldr pc, _prefetch_abort
42 _undefined_instruction:
43 .word undefined_instruction
45 .word software_interrupt
57 .balignl 16,0xdeadbeef
60 *************************************************************************
62 * Startup Code (reset vector)
64 * do important init only if we don't start from memory!
65 * setup Memory and board specific bits prior to relocation.
66 * relocate armboot to ram
69 *************************************************************************
73 /* IRQ stack memory (calculated at run-time) */
74 .globl IRQ_STACK_START
78 /* IRQ stack memory (calculated at run-time) */
79 .globl FIQ_STACK_START
84 /* IRQ stack memory (calculated at run-time) + 8 bytes */
85 .globl IRQ_STACK_START_IN
90 * the actual reset code
95 * set the cpu to SVC32 mode
103 * we do sys-critical inits only at reboot,
104 * not when booting from ram!
106 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
112 /*------------------------------------------------------------------------------*/
114 .globl c_runtime_cpu_setup
120 *************************************************************************
122 * CPU_init_critical registers
124 * setup important registers
125 * setup memory timing
127 *************************************************************************
131 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
134 * flush v4 I/D caches
137 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
138 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
141 * disable MMU stuff and caches
143 mrc p15, 0, r0, c1, c0, 0
144 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
145 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
146 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
147 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
148 mcr p15, 0, r0, c1, c0, 0
151 * Go setup Memory and board specific bits prior to relocation.
153 mov ip, lr /* perserve link reg across call */
154 bl lowlevel_init /* go setup memory */
155 mov lr, ip /* restore link */
156 mov pc, lr /* back to my caller */
159 *************************************************************************
163 *************************************************************************
169 #define S_FRAME_SIZE 72
191 #define MODE_SVC 0x13
195 * use bad_save_user_regs for abort/prefetch/undef/swi ...
196 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
199 .macro bad_save_user_regs
200 @ carve out a frame on current user stack
201 sub sp, sp, #S_FRAME_SIZE
202 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
204 ldr r2, IRQ_STACK_START_IN
205 @ get values for "aborted" pc and cpsr (into parm regs)
207 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
210 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
211 mov r0, sp @ save current stack into r0 (param register)
214 .macro irq_save_user_regs
215 sub sp, sp, #S_FRAME_SIZE
216 stmia sp, {r0 - r12} @ Calling r0-r12
217 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
219 stmdb r8, {sp, lr}^ @ Calling SP, LR
220 str lr, [r8, #0] @ Save calling PC
222 str r6, [r8, #4] @ Save CPSR
223 str r0, [r8, #8] @ Save OLD_R0
227 .macro irq_restore_user_regs
228 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
230 ldr lr, [sp, #S_PC] @ Get PC
231 add sp, sp, #S_FRAME_SIZE
232 subs pc, lr, #4 @ return & move spsr_svc into cpsr
236 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
238 str lr, [r13] @ save caller lr in position 0 of saved stack
239 mrs lr, spsr @ get the spsr
240 str lr, [r13, #4] @ save spsr in position 1 of saved stack
241 mov r13, #MODE_SVC @ prepare SVC-Mode
243 msr spsr, r13 @ switch modes, make sure moves will execute
244 mov lr, pc @ capture return pc
245 movs pc, lr @ jump to next instruction & switch modes.
248 .macro get_irq_stack @ setup IRQ stack
249 ldr sp, IRQ_STACK_START
252 .macro get_fiq_stack @ setup FIQ stack
253 ldr sp, FIQ_STACK_START
260 undefined_instruction:
263 bl do_undefined_instruction
269 bl do_software_interrupt
289 #ifdef CONFIG_USE_IRQ
296 irq_restore_user_regs
301 /* someone ought to write a more effiction fiq_save_user_regs */
304 irq_restore_user_regs